From patchwork Mon Sep 27 16:30:10 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Rodriguez X-Patchwork-Id: 212962 Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o8RGVmQZ014245 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Mon, 27 Sep 2010 16:32:09 GMT Received: from dlep36.itg.ti.com ([157.170.170.91]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id o8RGUFkG022543 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 27 Sep 2010 11:30:15 -0500 Received: from linux.omap.com (localhost [127.0.0.1]) by dlep36.itg.ti.com (8.13.8/8.13.8) with ESMTP id o8RGUD1I005625; Mon, 27 Sep 2010 11:30:14 -0500 (CDT) Received: from linux.omap.com (localhost [127.0.0.1]) by linux.omap.com (Postfix) with ESMTP id CD40E80627; Mon, 27 Sep 2010 11:30:13 -0500 (CDT) X-Original-To: davinci-linux-open-source@linux.davincidsp.com Delivered-To: davinci-linux-open-source@linux.davincidsp.com Received: from dflp53.itg.ti.com (dflp53.itg.ti.com [128.247.5.6]) by linux.omap.com (Postfix) with ESMTP id 3330D80626 for ; Mon, 27 Sep 2010 11:30:12 -0500 (CDT) Received: from neches.ext.ti.com (localhost [127.0.0.1]) by dflp53.itg.ti.com (8.13.8/8.13.8) with ESMTP id o8RGUB5D020069 for ; Mon, 27 Sep 2010 11:30:12 -0500 (CDT) Received: from psmtp.com (na3sys009amx227.postini.com [74.125.149.111]) by neches.ext.ti.com (8.13.7/8.13.7) with SMTP id o8RGUBJv016410 for ; Mon, 27 Sep 2010 11:30:11 -0500 Received: from source ([209.85.212.173]) by na3sys009amx227.postini.com ([74.125.148.10]) with SMTP; Mon, 27 Sep 2010 09:30:11 PDT Received: by pxi12 with SMTP id 12so1727970pxi.4 for ; Mon, 27 Sep 2010 09:30:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:received:received:in-reply-to :references:date:message-id:subject:from:to:cc:content-type; bh=pdx3k8yfpIR0OWXDIEJRa6oIknylEotTID6+3j04IXE=; b=Gt2nthXMv9k52ipazvuzNFEeeBWydkpos0fFr94koPqEsK3Vc4YNz3eyMapHxXAIo3 oYhxCStIoxPp3p/CSigPzbAiHsawmSEqrPcHhjAgPwQry+3YufT5xSln6R8DxtyhqIYv xOc1efJM3L16LN/sZDr06dpJar32Ucqok+Vlw= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; b=EKyrjHT7V/Gv7JrB5OwtA7+MC0HyenYfxiXSDMnNGdGbUyM+1zlU4uwRT44i7qB3Dg SF7C3hBLBCp6OH6JrSI7H83BKdvv+NOkGTCPsjC51WVOAL7uwtLXmPslJqAZhl+s48ov W2KuILjJ+1L4pLyamVpkvBFzJUXtP09L+ifFk= MIME-Version: 1.0 Received: by 10.142.3.33 with SMTP id 33mr6673901wfc.166.1285605010413; Mon, 27 Sep 2010 09:30:10 -0700 (PDT) Received: by 10.42.171.196 with HTTP; Mon, 27 Sep 2010 09:30:10 -0700 (PDT) In-Reply-To: <4CA09B33.5040308@ti.com> References: <4CA09B33.5040308@ti.com> Date: Mon, 27 Sep 2010 11:30:10 -0500 Message-ID: Subject: Re: Problem with EMAC conficuration From: Victor Rodriguez To: cyril@ti.com, michael.williamson@criticallink.com, Caglar Akyuz X-pstn-neptune: 0/0/0.00/0 X-pstn-levels: (S:99.90000/99.90000 CV:99.9000 FC:95.5390 LC:95.5390 R:95.9108 P:95.9108 M:97.0282 C:98.6951 ) X-pstn-settings: 2 (0.5000:0.0750) s cv GT3 gt2 gt1 r p m c X-pstn-addresses: from [db-null] Cc: davinci-linux-open-source@linux.davincidsp.com X-BeenThere: davinci-linux-open-source@linux.davincidsp.com X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: davinci-linux-open-source-bounces@linux.davincidsp.com Errors-To: davinci-linux-open-source-bounces@linux.davincidsp.com X-Greylist: Sender succeeded STARTTLS authentication, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Mon, 27 Sep 2010 16:32:10 +0000 (UTC) From 8d867a98edceda63eb2de17e5bfac83f6bef6cae Mon Sep 17 00:00:00 2001 From: Victor Rodriguez Date: Mon, 27 Sep 2010 11:01:32 -0500 Subject: [PATCH v1] davinci: EMAC support for Omapl138-Hawkboard This patch adds EMAC support for the Hawkboard-L138 system It is under the machine name "omapl138_hawkboard". This system is based on the da850 davinci CPU architecture. --- arch/arm/mach-davinci/board-omapl138-hawk.c | 95 +++++++++++++++++++++++++++ 1 files changed, 95 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c index c472dd8..9f3d311 100644 --- a/arch/arm/mach-davinci/board-omapl138-hawk.c +++ b/arch/arm/mach-davinci/board-omapl138-hawk.c @@ -19,6 +19,101 @@ #include #include +#include + +#define DA850_EVM_PHY_ID "0:07" +#define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) + + +#ifdef CONFIG_DA850_UI_RMII +static inline void omapl138_hawk_setup_emac_rmii(int rmii_sel) +{ + struct davinci_soc_info *soc_info = &davinci_soc_info; + + soc_info->emac_pdata->rmii_en = 1; + gpio_set_value(rmii_sel, 0); +} +#else +static inline void omapl138_hawk_setup_emac_rmii(int rmii_sel) { } +#endif + + +static const short hawk_mii_pins[] = { + DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, + DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, + DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, + DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, + DA850_MDIO_D, + -1 +}; + +static const short hawk_rmii_pins[] = { + DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, + DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, + DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, + DA850_MDIO_D, + -1 +}; + + +static int __init omapl138_hawk_config_emac(void) +{ + void __iomem *cfg_chip3_base; + int ret; + u32 val; + struct davinci_soc_info *soc_info = &davinci_soc_info; + u8 rmii_en = soc_info->emac_pdata->rmii_en; + + if (!machine_is_omapl138_hawkboard()) + return 0; + + cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); + + val = __raw_readl(cfg_chip3_base); + + if (rmii_en) { + val |= BIT(8); + ret = davinci_cfg_reg_list(hawk_rmii_pins); + pr_info("EMAC: RMII PHY configured, MII PHY will not be" + " functional\n"); + } else { + val &= ~BIT(8); + ret = davinci_cfg_reg_list(hawk_rmii_pins); + pr_info("EMAC: MII PHY configured, RMII PHY will not be" + " functional\n"); + } + + if (ret) + pr_warning("hawk_init: cpgmac/rmii mux setup failed: %d\n", + ret); + + /* configure the CFGCHIP3 register for RMII or MII */ + __raw_writel(val, cfg_chip3_base); + + ret = davinci_cfg_reg(DA850_GPIO2_6); + + if (ret) + pr_warning("hawk_init:GPIO(2,6) mux setup" "failed\n"); + + ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en"); + if (ret) { + pr_warning("Cannot open GPIO %d\n", + DA850_MII_MDIO_CLKEN_PIN); + return ret; + } + + /* Enable/Disable MII MDIO clock */ + gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en); + + soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID; + + ret = da8xx_register_emac(); + if (ret) + pr_warning("hawk_init: emac registration failed: %d\n", + ret); + return 0; +} +device_initcall(omapl138_hawk_config_emac); static struct davinci_uart_config omapl138_hawk_uart_config __initdata = { .enabled_uarts = 0x7, -- 1.6.0.5