| Message ID | 1691387509-2113129-1-git-send-email-radhey.shyam.pandey@amd.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | net: axienet: Introduce dmaengine | expand |
On Mon, 7 Aug 2023 11:21:39 +0530 Radhey Shyam Pandey wrote: > The axiethernet driver can use the dmaengine framework to communicate > with the xilinx DMAengine driver(AXIDMA, MCDMA). The inspiration behind > this dmaengine adoption is to reuse the in-kernel xilinx dma engine > driver[1] and remove redundant dma programming sequence[2] from the > ethernet driver. This simplifies the ethernet driver and also makes > it generic to be hooked to any complaint dma IP i.e AXIDMA, MCDMA > without any modification. > > The dmaengine framework was extended for metadata API support during > the axidma RFC[3] discussion. However, it still needs further > enhancements to make it well suited for ethernet usecases. > > Comments, suggestions, thoughts to implement remaining functional > features are very welcome! Vinod, any preference on how this gets merged? Since we're already at -rc5 if the dmaengine parts look good to you taking those in for 6.6 and delaying the networking bits until 6.7 could be on the table? Possibly?
On 08-08-23, 15:53, Jakub Kicinski wrote: > On Mon, 7 Aug 2023 11:21:39 +0530 Radhey Shyam Pandey wrote: > > The axiethernet driver can use the dmaengine framework to communicate > > with the xilinx DMAengine driver(AXIDMA, MCDMA). The inspiration behind > > this dmaengine adoption is to reuse the in-kernel xilinx dma engine > > driver[1] and remove redundant dma programming sequence[2] from the > > ethernet driver. This simplifies the ethernet driver and also makes > > it generic to be hooked to any complaint dma IP i.e AXIDMA, MCDMA > > without any modification. > > > > The dmaengine framework was extended for metadata API support during > > the axidma RFC[3] discussion. However, it still needs further > > enhancements to make it well suited for ethernet usecases. > > > > Comments, suggestions, thoughts to implement remaining functional > > features are very welcome! > > Vinod, any preference on how this gets merged? > Since we're already at -rc5 if the dmaengine parts look good to you > taking those in for 6.6 and delaying the networking bits until 6.7 > could be on the table? Possibly? Yep, I am picking the dmaengine bits
On Mon, 07 Aug 2023 11:21:39 +0530, Radhey Shyam Pandey wrote: > The axiethernet driver can use the dmaengine framework to communicate > with the xilinx DMAengine driver(AXIDMA, MCDMA). The inspiration behind > this dmaengine adoption is to reuse the in-kernel xilinx dma engine > driver[1] and remove redundant dma programming sequence[2] from the > ethernet driver. This simplifies the ethernet driver and also makes > it generic to be hooked to any complaint dma IP i.e AXIDMA, MCDMA > without any modification. > > [...] Applied, thanks! [01/10] dt-bindings: dmaengine: xilinx_dma:Add xlnx,axistream-connected property commit: 94afcfb819b3a07e55d463c29e2d594316f40b4a [02/10] dt-bindings: dmaengine: xilinx_dma: Add xlnx,irq-delay property commit: e8cfa385054c6aa7ae8dd743d8ea980039a0fc0b [03/10] dmaengine: xilinx_dma: Pass AXI4-Stream control words to dma client commit: d8a3f65f6c1de1028b9af6ca31d9dd3738fda97e [04/10] dmaengine: xilinx_dma: Increase AXI DMA transaction segment count commit: 491e9d409629964457d094ac2b99e319d428dd1d [05/10] dmaengine: xilinx_dma: Freeup active list based on descriptor completion bit commit: 7bcdaa65810212c999d21e5c3019d03da37b3be3 [06/10] dmaengine: xilinx_dma: Use tasklet_hi_schedule for timing critical usecase commit: c77d4c5081aa6508623be876afebff003a2e5875 [07/10] dmaengine: xilinx_dma: Program interrupt delay timeout commit: 84b798fedf3fa8f0ab0c096593ba817abc454fe5 Best regards,
The axiethernet driver can use the dmaengine framework to communicate with the xilinx DMAengine driver(AXIDMA, MCDMA). The inspiration behind this dmaengine adoption is to reuse the in-kernel xilinx dma engine driver[1] and remove redundant dma programming sequence[2] from the ethernet driver. This simplifies the ethernet driver and also makes it generic to be hooked to any complaint dma IP i.e AXIDMA, MCDMA without any modification. The dmaengine framework was extended for metadata API support during the axidma RFC[3] discussion. However, it still needs further enhancements to make it well suited for ethernet usecases. Comments, suggestions, thoughts to implement remaining functional features are very welcome! [1]: https://github.com/torvalds/linux/blob/master/drivers/dma/xilinx/xilinx_dma.c [2]: https://github.com/torvalds/linux/blob/master/drivers/net/ethernet/xilinx/xilinx_axienet_main.c#L238 [3]: http://lkml.iu.edu/hypermail/linux/kernel/1804.0/00367.html [4]: https://lore.kernel.org/all/20221124102745.2620370-1-sarath.babu.naidu.gaddam@amd.com Changes in v5: - Fix git am failure on net-next - Addressed DT binding review comments i.e Modified commit description to remove dmaengine framework references and instead describe how axiethernet IP uses DMA channels. - Fix "^[tr]x_chan[0-9]|1[0-5]$" -> "^[tr]x_chan([0-9]|1[0-5])$" - Drop generic dmas description. - Fix kmem_cache resource leak. - Merge Xilinx DMA enhancements and optimization[4] into this series. Changes in V4: - Updated commit description about tx/rx channels name(1/3). - Removed "dt-bindings" and "dmaengine" strings in subject(1/3). - Extended dmas and dma-names to support MCDMA channel names(1/3). - Rename has_dmas to use_dmaegine(2/3). - Remove the AXIENET_USE_DMA(2/3). - Remove the AXIENET_USE_DMA(3/3). - Add dev_err_probe for dma_request_chan error handling(3/3). - Add kmem_cache_destroy for create in axienet_setup_dma_chan(3/3). Changes in V3: - Moved RFC to PATCH. - Removed ethtool get/set coalesce, will be added later. - Added backward comapatible support. - Split the dmaengine support patch of V2 into two patches(2/3 and 3/3). https://lore.kernel.org/all/20220920055703.13246-4-sarath.babu.naidu.gaddam@amd.com/ Changes in V2: - Add ethtool get/set coalesce and DMA reset using DMAengine framework. - Add performance numbers. - Remove .txt and change the name of file to xlnx,axiethernet.yaml. - Fix DT check warning(Fix DT check warning('device_type' does not match any of the regexes:'pinctrl-[0-9]+' From schema: Documentation/ devicetree/bindings/net/xilinx_axienet.yaml). Radhey Shyam Pandey (9): dt-bindings: dmaengine: xilinx_dma:Add xlnx,axistream-connected property dt-bindings: dmaengine: xilinx_dma: Add xlnx,irq-delay property dmaengine: xilinx_dma: Pass AXI4-Stream control words to dma client dmaengine: xilinx_dma: Increase AXI DMA transaction segment count dmaengine: xilinx_dma: Freeup active list based on descriptor completion bit dmaengine: xilinx_dma: Use tasklet_hi_schedule for timing critical usecase dmaengine: xilinx_dma: Program interrupt delay timeout dt-bindings: net: xlnx,axi-ethernet: Introduce DMA support net: axienet: Introduce dmaengine support Sarath Babu Naidu Gaddam (1): net: axienet: Preparatory changes for dmaengine support .../bindings/dma/xilinx/xilinx_dma.txt | 6 + .../bindings/net/xlnx,axi-ethernet.yaml | 16 + drivers/dma/xilinx/xilinx_dma.c | 70 +- drivers/net/ethernet/xilinx/Kconfig | 1 + drivers/net/ethernet/xilinx/xilinx_axienet.h | 10 + .../net/ethernet/xilinx/xilinx_axienet_main.c | 622 ++++++++++++++---- 6 files changed, 591 insertions(+), 134 deletions(-)