From patchwork Thu Apr 17 08:46:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 4006741 X-Patchwork-Delegate: vinod.koul@intel.com Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6964E9F319 for ; Thu, 17 Apr 2014 08:53:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 999872037A for ; Thu, 17 Apr 2014 08:53:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B9EA320364 for ; Thu, 17 Apr 2014 08:53:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754883AbaDQIxh (ORCPT ); Thu, 17 Apr 2014 04:53:37 -0400 Received: from top.free-electrons.com ([176.31.233.9]:54394 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751520AbaDQIuK (ORCPT ); Thu, 17 Apr 2014 04:50:10 -0400 Received: by mail.free-electrons.com (Postfix, from userid 106) id 3934E7D9; Thu, 17 Apr 2014 10:50:11 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 8F6367A3; Thu, 17 Apr 2014 10:50:10 +0200 (CEST) From: Maxime Ripard To: Emilio Lopez , Dan Williams , Vinod Koul Cc: Mike Turquette , linux-arm-kernel@lists.infradead.org, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, kevin.z.m.zh@gmail.com, sunny@allwinnertech.com, shuge@allwinnertech.com, zhuzhenhua@allwinnertech.com, andriy.shevchenko@intel.com, Arnd Bergmann , Maxime Ripard Subject: [PATCH v6 3/8] ARM: sunxi: Move the clock protection to machine hooks Date: Thu, 17 Apr 2014 10:46:14 +0200 Message-Id: <1397724379-15398-4-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1397724379-15398-1-git-send-email-maxime.ripard@free-electrons.com> References: <1397724379-15398-1-git-send-email-maxime.ripard@free-electrons.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since we start to have a lot of clocks to protect, some of them in a few boards only, it becomes difficult to handle the clock protection without having to add per machine exceptions. Move these where they belong, in the machine definition code. Signed-off-by: Maxime Ripard --- arch/arm/mach-sunxi/sun4i.c | 9 +++++++++ arch/arm/mach-sunxi/sun5i.c | 14 ++++++++++++++ arch/arm/mach-sunxi/sun7i.c | 14 ++++++++++++++ drivers/clk/sunxi/clk-sunxi.c | 24 ------------------------ 4 files changed, 37 insertions(+), 24 deletions(-) diff --git a/arch/arm/mach-sunxi/sun4i.c b/arch/arm/mach-sunxi/sun4i.c index fc28b89b3378..3276e63587fb 100644 --- a/arch/arm/mach-sunxi/sun4i.c +++ b/arch/arm/mach-sunxi/sun4i.c @@ -10,6 +10,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include @@ -19,9 +20,17 @@ static void __init sun4i_dt_init(void) { + struct clk *clk; + sunxi_setup_restart(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + /* Make sure the clocks we absolutely need are enabled */ + /* DDR clock */ + clk = clk_get(NULL, "pll5_ddr"); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); } static const char * const sun4i_board_dt_compat[] = { diff --git a/arch/arm/mach-sunxi/sun5i.c b/arch/arm/mach-sunxi/sun5i.c index 623a95ad93b7..990dcfd42681 100644 --- a/arch/arm/mach-sunxi/sun5i.c +++ b/arch/arm/mach-sunxi/sun5i.c @@ -10,6 +10,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include @@ -19,9 +20,22 @@ static void __init sun5i_dt_init(void) { + struct clk *clk; + sunxi_setup_restart(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + /* Make sure the clocks we absolutely need are enabled */ + /* Memory bus clock */ + clk = clk_get(NULL, "mbus"); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); + + /* DDR clock */ + clk = clk_get(NULL, "pll5_ddr"); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); } static const char * const sun5i_board_dt_compat[] = { diff --git a/arch/arm/mach-sunxi/sun7i.c b/arch/arm/mach-sunxi/sun7i.c index 2e6a8ee1966b..48a090b91a90 100644 --- a/arch/arm/mach-sunxi/sun7i.c +++ b/arch/arm/mach-sunxi/sun7i.c @@ -10,6 +10,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include @@ -19,9 +20,22 @@ static void __init sun7i_dt_init(void) { + struct clk *clk; + sunxi_setup_restart(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + + /* Make sure the clocks we absolutely need are enabled */ + /* Memory bus clock */ + clk = clk_get(NULL, "mbus"); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); + + /* DDR clock */ + clk = clk_get(NULL, "pll5_ddr"); + if (!IS_ERR(clk)) + clk_prepare_enable(clk); } static const char * const sun7i_board_dt_compat[] = { diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index b1fde0f89bc1..b06200079f06 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -1285,27 +1285,6 @@ static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_mat } } -/** - * System clock protection - * - * By enabling these critical clocks, we prevent their accidental gating - * by the framework - */ -static void __init sunxi_clock_protect(void) -{ - struct clk *clk; - - /* memory bus clock - sun5i+ */ - clk = clk_get(NULL, "mbus"); - if (!IS_ERR(clk)) - clk_prepare_enable(clk); - - /* DDR clock - sun4i+ */ - clk = clk_get(NULL, "pll5_ddr"); - if (!IS_ERR(clk)) - clk_prepare_enable(clk); -} - static void __init sunxi_init_clocks(void) { /* Register factor clocks */ @@ -1322,9 +1301,6 @@ static void __init sunxi_init_clocks(void) /* Register gate clocks */ of_sunxi_table_clock_setup(clk_gates_match, sunxi_gates_clk_setup); - - /* Enable core system clocks */ - sunxi_clock_protect(); } CLK_OF_DECLARE(sun4i_a10_clk_init, "allwinner,sun4i-a10", sunxi_init_clocks); CLK_OF_DECLARE(sun5i_a10s_clk_init, "allwinner,sun5i-a10s", sunxi_init_clocks);