diff mbox

[v2,7/8] ARM: shmobile: r8a7790: Add DMAC devices to DT

Message ID 1405727425-6237-8-git-send-email-laurent.pinchart+renesas@ideasonboard.com (mailing list archive)
State Superseded
Delegated to: Vinod Koul
Headers show

Commit Message

Laurent Pinchart July 18, 2014, 11:50 p.m. UTC
Instantiate the two system DMA controllers in the r8a7790 device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

---

Changes since v1:

- Remove ch15 from interrupt names
---
 arch/arm/boot/dts/r8a7790.dtsi | 59 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 59 insertions(+)

Comments

Simon Horman Aug. 8, 2014, 2:19 a.m. UTC | #1
On Sat, Jul 19, 2014 at 01:50:24AM +0200, Laurent Pinchart wrote:
> Instantiate the two system DMA controllers in the r8a7790 device tree.
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Thanks. As the bindings have been merged I have queued up this patch for
v3.18.

> ---
> 
> Changes since v1:
> 
> - Remove ch15 from interrupt names
> ---
>  arch/arm/boot/dts/r8a7790.dtsi | 59 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 59 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 0922a38..4c74f21 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -249,6 +249,65 @@
>  			     <0 3 IRQ_TYPE_LEVEL_HIGH>;
>  	};
>  
> +	dmac0: dma-controller@e6700000 {
> +		compatible = "renesas,rcar-dmac";
> +		reg = <0 0xe6700000 0 0x20000>;
> +		interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
> +			      0 200 IRQ_TYPE_LEVEL_HIGH
> +			      0 201 IRQ_TYPE_LEVEL_HIGH
> +			      0 202 IRQ_TYPE_LEVEL_HIGH
> +			      0 203 IRQ_TYPE_LEVEL_HIGH
> +			      0 204 IRQ_TYPE_LEVEL_HIGH
> +			      0 205 IRQ_TYPE_LEVEL_HIGH
> +			      0 206 IRQ_TYPE_LEVEL_HIGH
> +			      0 207 IRQ_TYPE_LEVEL_HIGH
> +			      0 208 IRQ_TYPE_LEVEL_HIGH
> +			      0 209 IRQ_TYPE_LEVEL_HIGH
> +			      0 210 IRQ_TYPE_LEVEL_HIGH
> +			      0 211 IRQ_TYPE_LEVEL_HIGH
> +			      0 212 IRQ_TYPE_LEVEL_HIGH
> +			      0 213 IRQ_TYPE_LEVEL_HIGH
> +			      0 214 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "error",
> +				"ch0", "ch1", "ch2", "ch3",
> +				"ch4", "ch5", "ch6", "ch7",
> +				"ch8", "ch9", "ch10", "ch11",
> +				"ch12", "ch13", "ch14";
> +		clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
> +		clock-names = "fck";
> +		#dma-cells = <1>;
> +		dma-channels = <15>;
> +	};
> +
> +	dmac1: dma-controller@e6720000 {
> +		compatible = "renesas,rcar-dmac";
> +		reg = <0 0xe6720000 0 0x20000>;
> +		interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
> +			      0 216 IRQ_TYPE_LEVEL_HIGH
> +			      0 217 IRQ_TYPE_LEVEL_HIGH
> +			      0 218 IRQ_TYPE_LEVEL_HIGH
> +			      0 219 IRQ_TYPE_LEVEL_HIGH
> +			      0 308 IRQ_TYPE_LEVEL_HIGH
> +			      0 309 IRQ_TYPE_LEVEL_HIGH
> +			      0 310 IRQ_TYPE_LEVEL_HIGH
> +			      0 311 IRQ_TYPE_LEVEL_HIGH
> +			      0 312 IRQ_TYPE_LEVEL_HIGH
> +			      0 313 IRQ_TYPE_LEVEL_HIGH
> +			      0 314 IRQ_TYPE_LEVEL_HIGH
> +			      0 315 IRQ_TYPE_LEVEL_HIGH
> +			      0 316 IRQ_TYPE_LEVEL_HIGH
> +			      0 317 IRQ_TYPE_LEVEL_HIGH
> +			      0 318 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-names = "error",
> +				"ch0", "ch1", "ch2", "ch3",
> +				"ch4", "ch5", "ch6", "ch7",
> +				"ch8", "ch9", "ch10", "ch11",
> +				"ch12", "ch13", "ch14";
> +		clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
> +		clock-names = "fck";
> +		#dma-cells = <1>;
> +		dma-channels = <15>;
> +	};
>  	i2c0: i2c@e6508000 {
>  		#address-cells = <1>;
>  		#size-cells = <0>;
> -- 
> 1.8.5.5
> 
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Geert Uytterhoeven Aug. 13, 2014, 1:20 p.m. UTC | #2
Hi Simon,

On Fri, Aug 8, 2014 at 4:19 AM, Simon Horman <horms@verge.net.au> wrote:
> On Sat, Jul 19, 2014 at 01:50:24AM +0200, Laurent Pinchart wrote:
>> Instantiate the two system DMA controllers in the r8a7790 device tree.
>>
>> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
>
> Thanks. As the bindings have been merged I have queued up this patch for
> v3.18.

It seems you forgot to apply "[PATCH v2 6/8] ARM: shmobile: r8a7790: Add
DMAC clocks to DT", which adds the clocks that are used by "[PATCH v2 7/8]
ARM: shmobile: r8a7790: Add DMAC devices to DT".

As these clocks are referenced by (symbolic define for a) number, not a
phandle, you don't get an error from dtc.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Simon Horman Aug. 13, 2014, 11:41 p.m. UTC | #3
On Wed, Aug 13, 2014 at 03:20:04PM +0200, Geert Uytterhoeven wrote:
> Hi Simon,
> 
> On Fri, Aug 8, 2014 at 4:19 AM, Simon Horman <horms@verge.net.au> wrote:
> > On Sat, Jul 19, 2014 at 01:50:24AM +0200, Laurent Pinchart wrote:
> >> Instantiate the two system DMA controllers in the r8a7790 device tree.
> >>
> >> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> >
> > Thanks. As the bindings have been merged I have queued up this patch for
> > v3.18.
> 
> It seems you forgot to apply "[PATCH v2 6/8] ARM: shmobile: r8a7790: Add
> DMAC clocks to DT", which adds the clocks that are used by "[PATCH v2 7/8]
> ARM: shmobile: r8a7790: Add DMAC devices to DT".
> 
> As these clocks are referenced by (symbolic define for a) number, not a
> phandle, you don't get an error from dtc.

Thanks, I'll look into that.
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Simon Horman Aug. 14, 2014, 5:40 a.m. UTC | #4
On Thu, Aug 14, 2014 at 08:41:27AM +0900, Simon Horman wrote:
> On Wed, Aug 13, 2014 at 03:20:04PM +0200, Geert Uytterhoeven wrote:
> > Hi Simon,
> > 
> > On Fri, Aug 8, 2014 at 4:19 AM, Simon Horman <horms@verge.net.au> wrote:
> > > On Sat, Jul 19, 2014 at 01:50:24AM +0200, Laurent Pinchart wrote:
> > >> Instantiate the two system DMA controllers in the r8a7790 device tree.
> > >>
> > >> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > >
> > > Thanks. As the bindings have been merged I have queued up this patch for
> > > v3.18.
> > 
> > It seems you forgot to apply "[PATCH v2 6/8] ARM: shmobile: r8a7790: Add
> > DMAC clocks to DT", which adds the clocks that are used by "[PATCH v2 7/8]
> > ARM: shmobile: r8a7790: Add DMAC devices to DT".
> > 
> > As these clocks are referenced by (symbolic define for a) number, not a
> > phandle, you don't get an error from dtc.
> 
> Thanks, I'll look into that.

Thanks, for pointing out my miss.

I've queued up the missing patch and rebased the dt branch
so that the dependencies are in order. I'll push it and a
refreshed devel branch a little later today.
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diff mbox

Patch

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 0922a38..4c74f21 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -249,6 +249,65 @@ 
 			     <0 3 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	dmac0: dma-controller@e6700000 {
+		compatible = "renesas,rcar-dmac";
+		reg = <0 0xe6700000 0 0x20000>;
+		interrupts = <0 197 IRQ_TYPE_LEVEL_HIGH
+			      0 200 IRQ_TYPE_LEVEL_HIGH
+			      0 201 IRQ_TYPE_LEVEL_HIGH
+			      0 202 IRQ_TYPE_LEVEL_HIGH
+			      0 203 IRQ_TYPE_LEVEL_HIGH
+			      0 204 IRQ_TYPE_LEVEL_HIGH
+			      0 205 IRQ_TYPE_LEVEL_HIGH
+			      0 206 IRQ_TYPE_LEVEL_HIGH
+			      0 207 IRQ_TYPE_LEVEL_HIGH
+			      0 208 IRQ_TYPE_LEVEL_HIGH
+			      0 209 IRQ_TYPE_LEVEL_HIGH
+			      0 210 IRQ_TYPE_LEVEL_HIGH
+			      0 211 IRQ_TYPE_LEVEL_HIGH
+			      0 212 IRQ_TYPE_LEVEL_HIGH
+			      0 213 IRQ_TYPE_LEVEL_HIGH
+			      0 214 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "error",
+				"ch0", "ch1", "ch2", "ch3",
+				"ch4", "ch5", "ch6", "ch7",
+				"ch8", "ch9", "ch10", "ch11",
+				"ch12", "ch13", "ch14";
+		clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
+		clock-names = "fck";
+		#dma-cells = <1>;
+		dma-channels = <15>;
+	};
+
+	dmac1: dma-controller@e6720000 {
+		compatible = "renesas,rcar-dmac";
+		reg = <0 0xe6720000 0 0x20000>;
+		interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
+			      0 216 IRQ_TYPE_LEVEL_HIGH
+			      0 217 IRQ_TYPE_LEVEL_HIGH
+			      0 218 IRQ_TYPE_LEVEL_HIGH
+			      0 219 IRQ_TYPE_LEVEL_HIGH
+			      0 308 IRQ_TYPE_LEVEL_HIGH
+			      0 309 IRQ_TYPE_LEVEL_HIGH
+			      0 310 IRQ_TYPE_LEVEL_HIGH
+			      0 311 IRQ_TYPE_LEVEL_HIGH
+			      0 312 IRQ_TYPE_LEVEL_HIGH
+			      0 313 IRQ_TYPE_LEVEL_HIGH
+			      0 314 IRQ_TYPE_LEVEL_HIGH
+			      0 315 IRQ_TYPE_LEVEL_HIGH
+			      0 316 IRQ_TYPE_LEVEL_HIGH
+			      0 317 IRQ_TYPE_LEVEL_HIGH
+			      0 318 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "error",
+				"ch0", "ch1", "ch2", "ch3",
+				"ch4", "ch5", "ch6", "ch7",
+				"ch8", "ch9", "ch10", "ch11",
+				"ch12", "ch13", "ch14";
+		clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
+		clock-names = "fck";
+		#dma-cells = <1>;
+		dma-channels = <15>;
+	};
 	i2c0: i2c@e6508000 {
 		#address-cells = <1>;
 		#size-cells = <0>;