From patchwork Sat Sep 6 10:47:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 4857381 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 565D8C0338 for ; Sat, 6 Sep 2014 10:55:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7E13220142 for ; Sat, 6 Sep 2014 10:55:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5CD8820154 for ; Sat, 6 Sep 2014 10:55:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751359AbaIFKz2 (ORCPT ); Sat, 6 Sep 2014 06:55:28 -0400 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:49218 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751227AbaIFKzW (ORCPT ); Sat, 6 Sep 2014 06:55:22 -0400 Received: from mirror2.csie.ntu.edu.tw (mirror2.csie.ntu.edu.tw [140.112.30.76]) (Authenticated sender: b93043) by smtp.csie.ntu.edu.tw (Postfix) with ESMTPSA id DCEAD201FE; Sat, 6 Sep 2014 18:47:31 +0800 (CST) Received: by mirror2.csie.ntu.edu.tw (Postfix, from userid 1000) id B53F65F884; Sat, 6 Sep 2014 18:47:31 +0800 (CST) From: Chen-Yu Tsai To: Mike Turquette , Maxime Ripard , Emilio Lopez , Vinod Koul , Dan Williams , Grant Likely , Rob Herring Cc: Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, dmaengine@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/7] clk: sunxi: Fix PLL6 calculation on sun6i Date: Sat, 6 Sep 2014 18:47:23 +0800 Message-Id: <1410000448-9999-3-git-send-email-wens@csie.org> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1410000448-9999-1-git-send-email-wens@csie.org> References: <1410000448-9999-1-git-send-email-wens@csie.org> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-8.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The N factor for PLL6 counts from 1 to 32, as specified in the A23 manual, and shown in Allwinner's original A31 code. Also the PLL6 factors alone calculate the clock rate for PLL6x2, not the normal halved output for PLL6. This is what the factors clk .recalc_rate callback expects. This patch fixes the N factor in the clock driver, and adds a post PLL divider of 2 to calculate the rate for PLL6. A further patch (to the DT) should add a fixed-factor x2 clock as the PLL6x2 output. Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard --- drivers/clk/sunxi/clk-sunxi.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index b654b7b..be9ac07 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -246,7 +246,7 @@ static void sun4i_get_pll5_factors(u32 *freq, u32 parent_rate, /** * sun6i_a31_get_pll6_factors() - calculates n, k factors for A31 PLL6 * PLL6 rate is calculated as follows - * rate = parent_rate * n * (k + 1) / 2 + * rate = parent_rate * (n + 1) * (k + 1) / 2 * parent_rate is always 24Mhz */ @@ -273,7 +273,7 @@ static void sun6i_a31_get_pll6_factors(u32 *freq, u32 parent_rate, if (*k > 3) *k = 3; - *n = DIV_ROUND_UP(div, (*k+1)); + *n = DIV_ROUND_UP(div, (*k+1)) - 1; } /** @@ -494,6 +494,8 @@ static struct clk_factors_config sun6i_a31_pll6_config = { .nwidth = 5, .kshift = 4, .kwidth = 2, + .n_start = 1, + .post_div = 2, }; static struct clk_factors_config sun4i_apb1_config = {