From patchwork Tue Oct 21 01:06:15 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Gong X-Patchwork-Id: 5108761 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3306F9F30B for ; Tue, 21 Oct 2014 02:27:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4B9A220176 for ; Tue, 21 Oct 2014 02:27:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5064B20122 for ; Tue, 21 Oct 2014 02:27:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754015AbaJUC1q (ORCPT ); Mon, 20 Oct 2014 22:27:46 -0400 Received: from mail-bl2on0139.outbound.protection.outlook.com ([65.55.169.139]:55999 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753835AbaJUC1p (ORCPT ); Mon, 20 Oct 2014 22:27:45 -0400 X-Greylist: delayed 945 seconds by postgrey-1.27 at vger.kernel.org; Mon, 20 Oct 2014 22:27:45 EDT Received: from DM2PR03CA0031.namprd03.prod.outlook.com (10.141.96.30) by SN2PR03MB048.namprd03.prod.outlook.com (10.255.175.148) with Microsoft SMTP Server (TLS) id 15.1.6.6; Tue, 21 Oct 2014 02:11:58 +0000 Received: from BN1AFFO11FD010.protection.gbl (2a01:111:f400:7c10::120) by DM2PR03CA0031.outlook.office365.com (2a01:111:e400:2428::30) with Microsoft SMTP Server (TLS) id 15.0.1054.13 via Frontend Transport; Tue, 21 Oct 2014 02:11:58 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BN1AFFO11FD010.mail.protection.outlook.com (10.58.52.70) with Microsoft SMTP Server (TLS) id 15.0.1049.20 via Frontend Transport; Tue, 21 Oct 2014 02:11:58 +0000 Received: from shlinux2.ap.freescale.net (shlinux2.ap.freescale.net [10.192.224.44]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s9L2BpeN005472; Mon, 20 Oct 2014 19:11:55 -0700 From: Robin Gong To: , , CC: , , Subject: [PATCH v1] ARM: imx6: add pm_power_off support for i.mx6 chips Date: Tue, 21 Oct 2014 09:06:15 +0800 Message-ID: <1413853584-18325-2-git-send-email-b38343@freescale.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1413853584-18325-1-git-send-email-b38343@freescale.com> References: <1413853584-18325-1-git-send-email-b38343@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:CAL; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(199003)(189002)(84676001)(80022003)(104166001)(102836001)(46102003)(104016003)(95666004)(106466001)(4396001)(105606002)(76176999)(26826002)(50226001)(50466002)(48376002)(62966002)(21056001)(89996001)(50986999)(88136002)(36756003)(97736003)(85852003)(68736004)(76482002)(87286001)(99396003)(20776003)(87936001)(85306004)(19580405001)(47776003)(64706001)(44976005)(92726001)(33646002)(229853001)(93916002)(2201001)(6806004)(107046002)(120916001)(77156001)(31966008)(19580395003)(92566001)(42262002); DIR:OUT; SFP:1102; SCL:1; SRVR:SN2PR03MB048; H:tx30smr01.am.freescale.net; FPR:; MLV:ovrnspm; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:SN2PR03MB048; X-Exchange-Antispam-Report-Test: UriScan:; X-Forefront-PRVS: 0371762FE7 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=yibin.gong@freescale.com; X-OriginatorOrg: freescale.com Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP All chips of i.mx6 can be powered off by programming SNVS. For example : On i.mx6q-sabresd board, PMIC_ON_REQ connect with external pmic ON/OFF pin, that will cause the whole PMIC powered off except VSNVS. And system can restart once PMIC_ON_REQ goes high by push POWRER key. Signed-off-by: Robin Gong --- arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/mach-imx6q.c | 2 ++ arch/arm/mach-imx/mach-imx6sl.c | 2 ++ arch/arm/mach-imx/mach-imx6sx.c | 2 ++ arch/arm/mach-imx/system.c | 22 +++++++++++++++++++++- 5 files changed, 28 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 1dabf43..baca11a 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -62,6 +62,7 @@ void mxc_set_cpu_type(unsigned int type); void mxc_restart(enum reboot_mode, const char *); void mxc_arch_reset_init(void __iomem *); void mxc_arch_reset_init_dt(void); +void mxc_power_off_init(void); int mx51_revision(void); int mx53_revision(void); void imx_set_aips(void __iomem *); diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index d51c6e9..3d6610d 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -270,6 +270,8 @@ static void __init imx6q_init_machine(void) mxc_arch_reset_init_dt(); + mxc_power_off_init(); + parent = imx_soc_device_init(); if (parent == NULL) pr_warn("failed to initialize soc device\n"); diff --git a/arch/arm/mach-imx/mach-imx6sl.c b/arch/arm/mach-imx/mach-imx6sl.c index ed263a2..c07e6e8 100644 --- a/arch/arm/mach-imx/mach-imx6sl.c +++ b/arch/arm/mach-imx/mach-imx6sl.c @@ -50,6 +50,8 @@ static void __init imx6sl_init_machine(void) mxc_arch_reset_init_dt(); + mxc_power_off_init(); + parent = imx_soc_device_init(); if (parent == NULL) pr_warn("failed to initialize soc device\n"); diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c index 3de3b73..68ea070 100644 --- a/arch/arm/mach-imx/mach-imx6sx.c +++ b/arch/arm/mach-imx/mach-imx6sx.c @@ -20,6 +20,8 @@ static void __init imx6sx_init_machine(void) mxc_arch_reset_init_dt(); + mxc_power_off_init(); + parent = imx_soc_device_init(); if (parent == NULL) pr_warn("failed to initialize soc device\n"); diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index d14c33f..925fb29 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -32,7 +33,9 @@ #include "common.h" #include "hardware.h" -static void __iomem *wdog_base; +#define SNVS_LPCR 0x04 + +static void __iomem *wdog_base, *snvs_base; static struct clk *wdog_clk; /* @@ -104,6 +107,23 @@ void __init mxc_arch_reset_init_dt(void) clk_prepare(wdog_clk); } +static void power_off_snvs(void) +{ + u32 value = readl(snvs_base + SNVS_LPCR); + /* set TOP and DP_EN bit */ + writel(value | 0x60, snvs_base + SNVS_LPCR); +} + +void __init mxc_power_off_init(void) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0-mon-rtc-lp"); + snvs_base = of_iomap(np, 0); + WARN_ON(!snvs_base); + pm_power_off = power_off_snvs; +} + #ifdef CONFIG_CACHE_L2X0 void __init imx_init_l2cache(void) {