From patchwork Thu Dec 11 22:59:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Bresticker X-Patchwork-Id: 5478131 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1B8FD9F30B for ; Thu, 11 Dec 2014 23:02:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 418C8201F4 for ; Thu, 11 Dec 2014 23:02:52 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AA78F201C8 for ; Thu, 11 Dec 2014 23:02:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S967475AbaLKW70 (ORCPT ); Thu, 11 Dec 2014 17:59:26 -0500 Received: from mail-vc0-f201.google.com ([209.85.220.201]:49863 "EHLO mail-vc0-f201.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S967468AbaLKW7W (ORCPT ); Thu, 11 Dec 2014 17:59:22 -0500 Received: by mail-vc0-f201.google.com with SMTP id hq11so366547vcb.4 for ; Thu, 11 Dec 2014 14:59:21 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JA8lUOrJKqrm6tGEL3fGQ2141/wR3jfU4rxPzx07q7M=; b=ksVyNXVsj0Ulw5GmmjjEniuNITlRBG8xuzGVXr7NYN6ExuBoAu7DZ3Hifn35pk11Wi bTkQiw2P9vDswqozE3qa8dgCl91+XVWep9l2SUpDdjdWH6NLC47D0AN/4IiAjABqcGKI wfrDJhUaxJuNnwa7u9iwLC7GdI4Fr8imMzn9Ymz5xSe6VJ+QMxBBDgW+r/d4eXQNo7SD cy4GudE0rTQp61cz0wTuJqCxeSN6t/6ZR9HDxl/FDsFbQDOSEE44lOGx22L8jQ9jN01i ryvzeOOKtbCCupfo4h+bElAXj3NMkTLflK85PhjjkUmfgkWjUj6wLnjasw+k37n23LL6 pbww== X-Gm-Message-State: ALoCoQnv6/KnDsrGT5RtfBmG6fU5CHLqWAsYTdprz+x2X/WQhr1ED47/tP5IbjfLeg+SpeGwhzfO X-Received: by 10.236.32.101 with SMTP id n65mr10771554yha.26.1418338761089; Thu, 11 Dec 2014 14:59:21 -0800 (PST) Received: from corpmail-nozzle1-2.hot.corp.google.com ([100.108.1.103]) by gmr-mx.google.com with ESMTPS id u7si429341qcf.2.2014.12.11.14.59.19 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Dec 2014 14:59:21 -0800 (PST) Received: from abrestic.mtv.corp.google.com ([172.22.65.70]) by corpmail-nozzle1-2.hot.corp.google.com with ESMTP id 1WzoydG6.1; Thu, 11 Dec 2014 14:59:20 -0800 Received: by abrestic.mtv.corp.google.com (Postfix, from userid 137652) id 27DBF220913; Thu, 11 Dec 2014 14:59:19 -0800 (PST) From: Andrew Bresticker To: Vinod Koul , Dan Williams Cc: Andrew Bresticker , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Grant Likely , James Hartley , James Hogan , Ezequiel Garcia , Damien Horsley , Arnd Bergmann , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH V3 1/2] dmaengine: Add binding document for IMG MDC Date: Thu, 11 Dec 2014 14:59:16 -0800 Message-Id: <1418338757-10022-2-git-send-email-abrestic@chromium.org> X-Mailer: git-send-email 2.2.0.rc0.207.ga3a616c In-Reply-To: <1418338757-10022-1-git-send-email-abrestic@chromium.org> References: <1418338757-10022-1-git-send-email-abrestic@chromium.org> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a binding document for the IMG Multi-threaded DMA Controller (MDC) present on the MIPS-based Pistachio and other IMG SoCs. Signed-off-by: Andrew Bresticker Acked-by: Arnd Bergmann --- No changes from v1/v2. --- .../devicetree/bindings/dma/img-mdc-dma.txt | 57 ++++++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/img-mdc-dma.txt diff --git a/Documentation/devicetree/bindings/dma/img-mdc-dma.txt b/Documentation/devicetree/bindings/dma/img-mdc-dma.txt new file mode 100644 index 0000000..28c1341 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/img-mdc-dma.txt @@ -0,0 +1,57 @@ +* IMG Multi-threaded DMA Controller (MDC) + +Required properties: +- compatible: Must be "img,pistachio-mdc-dma". +- reg: Must contain the base address and length of the MDC registers. +- interrupts: Must contain all the per-channel DMA interrupts. +- clocks: Must contain an entry for each entry in clock-names. + See ../clock/clock-bindings.txt for details. +- clock-names: Must include the following entries: + - sys: MDC system interface clock. +- img,cr-periph: Must contain a phandle to the peripheral control syscon + node which contains the DMA request to channel mapping registers. +- img,max-burst-multiplier: Must be the maximum supported burst size multiplier. + The maximum burst size is this value multiplied by the hardware-reported bus + width. +- #dma-cells: Must be 3: + - The first cell is the peripheral's DMA request line. + - The second cell is a bitmap specifying to which channels the DMA request + line may be mapped (i.e. bit N set indicates channel N is usable). + - The third cell is the thread ID to be used by the channel. + +Optional properties: +- dma-channels: Number of supported DMA channels, up to 32. If not specified + the number reported by the hardware is used. + +Example: + +mdc: dma-controller@18143000 { + compatible = "img,pistachio-mdc-dma"; + reg = <0x18143000 0x1000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + ; + clocks = <&system_clk>; + clock-names = "sys"; + + img,max-burst-multiplier = <16>; + img,cr-periph = <&cr_periph>; + + #dma-cells = <3>; +}; + +spi@18100f00 { + ... + dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>; + dma-names = "tx", "rx"; + ... +};