From patchwork Mon Jan 19 12:41:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rameshwar Prasad Sahu X-Patchwork-Id: 5658551 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 330FCC058D for ; Mon, 19 Jan 2015 12:43:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6EF6C2035B for ; Mon, 19 Jan 2015 12:43:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A23B9202F8 for ; Mon, 19 Jan 2015 12:43:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752055AbbASMmz (ORCPT ); Mon, 19 Jan 2015 07:42:55 -0500 Received: from denmail01-v4020.amcc.com ([192.195.68.30]:35725 "EHLO denmail01.apm.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752025AbbASMmv (ORCPT ); Mon, 19 Jan 2015 07:42:51 -0500 Received: from apm.com (pnqlwv041.amcc.com [10.48.19.141]) by denmail01.apm.com (8.13.8/8.13.8) with ESMTP id t0JCfqwv001524; Mon, 19 Jan 2015 05:41:53 -0700 Received: (from rsahu@localhost) by apm.com (8.13.8/8.13.8/Submit) id t0JCfqDt019490; Mon, 19 Jan 2015 18:11:52 +0530 From: Rameshwar Prasad Sahu To: vinod.koul@intel.com, dan.j.williams@intel.com Cc: dmaengine@vger.kernel.org, arnd@arndb.de, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, ddutile@redhat.com, jcm@redhat.com, patches@apm.com, Rameshwar Prasad Sahu , Loc Ho Subject: [PATCH v3 2/3] arm64: dts: Add APM X-Gene DMA device and DMA clock DTS nodes Date: Mon, 19 Jan 2015 18:11:08 +0530 Message-Id: <1421671269-19441-3-git-send-email-rsahu@apm.com> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1421671269-19441-1-git-send-email-rsahu@apm.com> References: <1421671269-19441-1-git-send-email-rsahu@apm.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds the device tree node for APM X-Gene SoC DMA controller and DMA clock. Signed-off-by: Rameshwar Prasad Sahu Signed-off-by: Loc Ho --- arch/arm64/boot/dts/apm/apm-storm.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) -- 1.8.2.1 -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index f1ad9c2..e20da23 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -103,6 +103,9 @@ #size-cells = <2>; ranges; + /* DDR range is 42-bit addressing */ + dma-ranges = <0x40 0x0 0x40 0x0 0x1ff 0xffffffff>; + clocks { #address-cells = <2>; #size-cells = <2>; @@ -352,6 +355,15 @@ reg-names = "csr-reg"; clock-output-names = "pcie4clk"; }; + + dmaclk: dmaclk@1f27c000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + reg = <0x0 0x1f27c000 0x0 0x1000>; + reg-names = "csr-reg"; + clock-output-names = "dmaclk"; + }; }; pcie0: pcie@1f2b0000 { @@ -656,5 +668,21 @@ interrupts = <0x0 0x41 0x4>; clocks = <&rngpkaclk 0>; }; + + dma: dma@1f270000 { + compatible = "apm,xgene-dma"; + device_type = "dma"; + reg = <0x0 0x1f270000 0x0 0x10000>, + <0x0 0x1f200000 0x0 0x10000>, + <0x0 0x1b008000 0x0 0x2000>; + reg-names = "dma_csr", "ring_csr", "ring_cmd"; + interrupts = <0x0 0x82 0x4>, + <0x0 0xb8 0x4>, + <0x0 0xb9 0x4>, + <0x0 0xba 0x4>, + <0x0 0xbb 0x4>; + dma-coherent; + clocks = <&dmaclk 0>; + }; }; };