From patchwork Mon Mar 2 18:16:01 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 5916611 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6EF43BF440 for ; Mon, 2 Mar 2015 18:18:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 84AFB20219 for ; Mon, 2 Mar 2015 18:18:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 723CA2021F for ; Mon, 2 Mar 2015 18:18:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754203AbbCBSS4 (ORCPT ); Mon, 2 Mar 2015 13:18:56 -0500 Received: from mga14.intel.com ([192.55.52.115]:15815 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753508AbbCBSSz (ORCPT ); Mon, 2 Mar 2015 13:18:55 -0500 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga103.fm.intel.com with ESMTP; 02 Mar 2015 10:11:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,676,1418112000"; d="scan'208";a="692825770" Received: from smile.fi.intel.com (HELO smile) ([10.237.72.90]) by orsmga002.jf.intel.com with ESMTP; 02 Mar 2015 10:16:09 -0800 Received: from andy by smile with local (Exim 4.84) (envelope-from ) id 1YSUsx-0003bX-6n; Mon, 02 Mar 2015 20:16:07 +0200 From: Andy Shevchenko To: Vinod Koul , Mark Brown , dmaengine@vger.kernel.org, linux-spi@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v2 4/9] spi: dw-mid: split dma_setup() from dma_transfer() Date: Mon, 2 Mar 2015 20:16:01 +0200 Message-Id: <1425320166-13788-5-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1425320166-13788-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1425320166-13788-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch splits DMA preparatory code to dma_setup() callback. The change also converts transfer_one() to program DMA whenever the transfer is DMA mapped. The change is a follow up of the converion to use SPI core transfer_one_message(). Since the DMA mapped transfers can be interleaved with PIO ones the DMA related configuration should respect that. Signed-off-by: Andy Shevchenko --- drivers/spi/spi-dw-mid.c | 17 ++++++----------- drivers/spi/spi-dw.c | 23 +++++++++++++---------- drivers/spi/spi-dw.h | 4 ++-- 3 files changed, 21 insertions(+), 23 deletions(-) diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c index 25c8fa7..4b4d266 100644 --- a/drivers/spi/spi-dw-mid.c +++ b/drivers/spi/spi-dw-mid.c @@ -207,12 +207,10 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws) return rxdesc; } -static void dw_spi_dma_setup(struct dw_spi *dws) +static int mid_spi_dma_setup(struct dw_spi *dws) { u16 dma_ctrl = 0; - spi_enable_chip(dws, 0); - dw_writew(dws, DW_SPI_DMARDLR, 0xf); dw_writew(dws, DW_SPI_DMATDLR, 0x10); @@ -222,21 +220,17 @@ static void dw_spi_dma_setup(struct dw_spi *dws) dma_ctrl |= SPI_DMA_RDMAE; dw_writew(dws, DW_SPI_DMACR, dma_ctrl); - spi_enable_chip(dws, 1); + return 0; } -static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change) +static int mid_spi_dma_transfer(struct dw_spi *dws) { struct dma_async_tx_descriptor *txdesc, *rxdesc; - /* 1. setup DMA related registers */ - if (cs_change) - dw_spi_dma_setup(dws); - - /* 2. Prepare the TX dma transfer */ + /* Prepare the TX dma transfer */ txdesc = dw_spi_dma_prepare_tx(dws); - /* 3. Prepare the RX dma transfer */ + /* Prepare the RX dma transfer */ rxdesc = dw_spi_dma_prepare_rx(dws); /* rx must be started before tx due to spi instinct */ @@ -258,6 +252,7 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, int cs_change) static struct dw_spi_dma_ops mid_dma_ops = { .dma_init = mid_spi_dma_init, .dma_exit = mid_spi_dma_exit, + .dma_setup = mid_spi_dma_setup, .dma_transfer = mid_spi_dma_transfer, }; #endif diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c index f3e4092..c7c2fcc 100644 --- a/drivers/spi/spi-dw.c +++ b/drivers/spi/spi-dw.c @@ -316,11 +316,11 @@ static int dw_spi_transfer_one(struct spi_master *master, struct dw_spi *dws = spi_master_get_devdata(master); struct chip_data *chip = spi_get_ctldata(spi); u8 imask = 0; - u8 cs_change = 0; u16 txlevel = 0; u16 clk_div = 0; u32 speed = 0; u32 cr0 = 0; + int ret; dws->n_bytes = chip->n_bytes; dws->dma_width = chip->dma_width; @@ -332,8 +332,6 @@ static int dw_spi_transfer_one(struct spi_master *master, dws->rx = transfer->rx_buf; dws->rx_end = dws->rx + transfer->len; dws->len = transfer->len; - if (chip != dws->prev_chip) - cs_change = 1; spi_enable_chip(dws, 0); @@ -397,7 +395,13 @@ static int dw_spi_transfer_one(struct spi_master *master, * Interrupt mode * we only need set the TXEI IRQ, as TX/RX always happen syncronizely */ - if (!dws->dma_mapped && !chip->poll_mode) { + if (dws->dma_mapped) { + ret = dws->dma_ops->dma_setup(dws); + if (ret < 0) { + spi_enable_chip(dws, 1); + return ret; + } + } else if (!chip->poll_mode) { txlevel = min_t(u16, dws->fifo_len / 2, dws->len / dws->n_bytes); dw_writew(dws, DW_SPI_TXFLTR, txlevel); @@ -411,11 +415,11 @@ static int dw_spi_transfer_one(struct spi_master *master, spi_enable_chip(dws, 1); - if (cs_change) - dws->prev_chip = chip; - - if (dws->dma_mapped) - dws->dma_ops->dma_transfer(dws, cs_change); + if (dws->dma_mapped) { + ret = dws->dma_ops->dma_transfer(dws); + if (ret < 0) + return ret; + } if (chip->poll_mode) return poll_transfer(dws); @@ -546,7 +550,6 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) dws->master = master; dws->type = SSI_MOTO_SPI; - dws->prev_chip = NULL; dws->dma_inited = 0; dws->dma_addr = (dma_addr_t)(dws->paddr + 0x60); snprintf(dws->name, sizeof(dws->name), "dw_spi%d", dws->bus_num); diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h index 855bfdd..7351692 100644 --- a/drivers/spi/spi-dw.h +++ b/drivers/spi/spi-dw.h @@ -91,7 +91,8 @@ struct dw_spi; struct dw_spi_dma_ops { int (*dma_init)(struct dw_spi *dws); void (*dma_exit)(struct dw_spi *dws); - int (*dma_transfer)(struct dw_spi *dws, int cs_change); + int (*dma_setup)(struct dw_spi *dws); + int (*dma_transfer)(struct dw_spi *dws); }; struct dw_spi { @@ -109,7 +110,6 @@ struct dw_spi { u16 num_cs; /* supported slave numbers */ /* Current message transfer state info */ - struct chip_data *prev_chip; size_t len; void *tx; void *tx_end;