From patchwork Mon Mar 2 18:16:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 5916471 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 710F7BF440 for ; Mon, 2 Mar 2015 18:16:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9C8A12024F for ; Mon, 2 Mar 2015 18:16:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6D5012025A for ; Mon, 2 Mar 2015 18:16:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753948AbbCBSQM (ORCPT ); Mon, 2 Mar 2015 13:16:12 -0500 Received: from mga11.intel.com ([192.55.52.93]:13183 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753926AbbCBSQL (ORCPT ); Mon, 2 Mar 2015 13:16:11 -0500 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP; 02 Mar 2015 10:16:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,676,1418112000"; d="scan'208";a="461442062" Received: from smile.fi.intel.com (HELO smile) ([10.237.72.90]) by FMSMGA003.fm.intel.com with ESMTP; 02 Mar 2015 10:10:01 -0800 Received: from andy by smile with local (Exim 4.84) (envelope-from ) id 1YSUsx-0003bb-73; Mon, 02 Mar 2015 20:16:07 +0200 From: Andy Shevchenko To: Vinod Koul , Mark Brown , dmaengine@vger.kernel.org, linux-spi@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v2 5/9] spi: dw-mid: take care of FIFO overrun/underrun when do DMA Date: Mon, 2 Mar 2015 20:16:02 +0200 Message-Id: <1425320166-13788-6-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1425320166-13788-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1425320166-13788-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In according to documentation SPI in DMA mode may encounter underrun/overrun failures in rare cases. When such failure occurs, an error recovery protocol is expected to be implemented in the device driver so that the failed transaction can be restarted. This patch enables FIFO overrun / underrun interrupts in DMA case and adds a handler for that. Signed-off-by: Andy Shevchenko --- drivers/spi/spi-dw-mid.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c index 4b4d266..3729cdd 100644 --- a/drivers/spi/spi-dw-mid.c +++ b/drivers/spi/spi-dw-mid.c @@ -100,6 +100,22 @@ static void mid_spi_dma_exit(struct dw_spi *dws) dma_release_channel(dws->rxchan); } +static irqreturn_t dma_transfer(struct dw_spi *dws) +{ + u16 irq_status = dw_readw(dws, DW_SPI_ISR); + + if (!irq_status) + return IRQ_NONE; + + dw_readw(dws, DW_SPI_ICR); + spi_reset_chip(dws); + + dev_err(&dws->master->dev, "%s: FIFO overrun/underrun\n", __func__); + dws->master->cur_msg->status = -EIO; + spi_finalize_current_transfer(dws->master); + return IRQ_HANDLED; +} + static enum dma_slave_buswidth convert_dma_width(u32 dma_width) { if (dma_width == 1) return DMA_SLAVE_BUSWIDTH_1_BYTE; @@ -220,6 +236,11 @@ static int mid_spi_dma_setup(struct dw_spi *dws) dma_ctrl |= SPI_DMA_RDMAE; dw_writew(dws, DW_SPI_DMACR, dma_ctrl); + /* Set the interrupt mask */ + spi_umask_intr(dws, SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI); + + dws->transfer_handler = dma_transfer; + return 0; }