From patchwork Thu Oct 8 15:20:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: M'boumba Cedric Madianga X-Patchwork-Id: 7353681 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 0B515BEEA4 for ; Thu, 8 Oct 2015 15:21:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4CC38205CB for ; Thu, 8 Oct 2015 15:21:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C0A8B2064D for ; Thu, 8 Oct 2015 15:21:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933685AbbJHPUs (ORCPT ); Thu, 8 Oct 2015 11:20:48 -0400 Received: from mail-wi0-f196.google.com ([209.85.212.196]:36186 "EHLO mail-wi0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934240AbbJHPUl (ORCPT ); Thu, 8 Oct 2015 11:20:41 -0400 Received: by wibgw2 with SMTP id gw2so3358565wib.3; Thu, 08 Oct 2015 08:20:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=g2R1PD8osxwSW1aU4jNhbSgoUwCtSyJGxxtGQFd6IJo=; b=SWZXPxCM2y8WX0oXDMPKvgHzq2wma2I7t7MHqAmGk/Grm0VWg7LQG7lzs0Qzjv57i4 v5L9sUyn4in/BXLrYTZGNpwfoUHeE6Qg8VdX20tXP4iAd2vs/FaeEBHPmxm1Di+3uAdi iyj1lhCQhhYvQoE6u+qm/DBJSu7mYgCYpGohBqkWYu7l3+ZeOCJogTGfXkwgPYo4LuDW 3k3WTFGx0eBxsFu6K0ga4ZyfzQhJOQ4Xk3kppznobSYAr7WE9qOgERtwIyCuuIUdTVPu n8+YyNUwrmMvqL8ODU2dbUrm8iK8shrPYuYm4ZlPqoPuGz7lwc78zTcxmuBEFg9ctb6o Ngiw== X-Received: by 10.195.11.232 with SMTP id el8mr8596499wjd.138.1444317640238; Thu, 08 Oct 2015 08:20:40 -0700 (PDT) Received: from lmenx29w.st.com. ([80.12.35.171]) by smtp.gmail.com with ESMTPSA id gl4sm46822019wjb.29.2015.10.08.08.20.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 08 Oct 2015 08:20:39 -0700 (PDT) From: M'boumba Cedric Madianga To: mcoquelin.stm32@gmail.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, vinod.koul@intel.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org Cc: M'boumba Cedric Madianga Subject: [PATCH 3/4] ARM: dts: Add STM32 DMA support for STM32F429 MCU Date: Thu, 8 Oct 2015 17:20:11 +0200 Message-Id: <1444317612-818-4-git-send-email-cedric.madianga@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1444317612-818-1-git-send-email-cedric.madianga@gmail.com> References: <1444317612-818-1-git-send-email-cedric.madianga@gmail.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds STM32 DMA bindings for STM32F429. Signed-off-by: M'boumba Cedric Madianga --- arch/arm/boot/dts/stm32f429.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index d78a481..037eb29 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -174,6 +174,37 @@ reg = <0x40023800 0x400>; clocks = <&clk_hse>; }; + + dma1: dma-controller@40026000 { + compatible = "st,stm32-dma"; + reg = <0x40026000 0x400>; + interrupts = <11>, + <12>, + <13>, + <14>, + <15>, + <16>, + <17>, + <47>; + clocks = <&rcc 0 21>; + #dma-cells = <4>; + }; + + dma2: dma-controller@40026400 { + compatible = "st,stm32-dma"; + reg = <0x40026400 0x400>; + interrupts = <56>, + <57>, + <58>, + <59>, + <60>, + <68>, + <69>, + <70>; + clocks = <&rcc 0 22>; + #dma-cells = <4>; + st,mem2mem; + }; }; };