From patchwork Mon Nov 16 09:08:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rameshwar Prasad Sahu X-Patchwork-Id: 7623301 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 76F71BF90C for ; Mon, 16 Nov 2015 10:12:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 834A5205B5 for ; Mon, 16 Nov 2015 10:12:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7DE2F2058A for ; Mon, 16 Nov 2015 10:12:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752373AbbKPKLT (ORCPT ); Mon, 16 Nov 2015 05:11:19 -0500 Received: from [198.137.200.161] ([198.137.200.161]:57625 "EHLO denmail01.amcc.com" rhost-flags-FAIL-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752168AbbKPKLL (ORCPT ); Mon, 16 Nov 2015 05:11:11 -0500 X-Greylist: delayed 3447 seconds by postgrey-1.27 at vger.kernel.org; Mon, 16 Nov 2015 05:11:08 EST Received: from apm.com (pnqlwv037.amcc.com [10.48.19.137]) by denmail01.amcc.com (8.13.8/8.13.8) with ESMTP id tAG98uEN019104; Mon, 16 Nov 2015 02:08:57 -0700 Received: (from stripath@localhost) by apm.com (8.14.4/8.14.4/Submit) id tAG98tUI012874; Mon, 16 Nov 2015 14:38:55 +0530 From: rsahu@apm.com To: vinod.koul@intel.com, dan.j.williams@intel.com Cc: dmaengine@vger.kernel.org, arnd@arndb.de, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jcm@redhat.com, patches@apm.com, Rameshwar Prasad Sahu Subject: [PATCH v2 1/3] dmaengine: Add support for new feature CRC32C computations Date: Mon, 16 Nov 2015 14:38:35 +0530 Message-Id: <1447664917-12574-2-git-send-email-rsahu@apm.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: References: Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-7.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Rameshwar Prasad Sahu This patch adds support for new feature CRC32C computations in dmaengine framework. Signed-of-by: Rameshwar Prasad Sahu --- Documentation/dmaengine/provider.txt | 3 +++ drivers/dma/dmaengine.c | 2 ++ include/linux/dmaengine.h | 13 +++++++++++++ 3 files changed, 18 insertions(+), 0 deletions(-) -- 1.7.1 -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/dmaengine/provider.txt b/Documentation/dmaengine/provider.txt index 67d4ce4..2399d6f 100644 --- a/Documentation/dmaengine/provider.txt +++ b/Documentation/dmaengine/provider.txt @@ -224,6 +224,9 @@ Currently, the types available are: want to transfer a portion of uncompressed data directly to the display to print it + * DMA_CRC32C + - The device is able to perform CRC32C computations + These various types will also affect how the source and destination addresses change over time. diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c index 09479d4..8cd0365 100644 --- a/drivers/dma/dmaengine.c +++ b/drivers/dma/dmaengine.c @@ -865,6 +865,8 @@ int dma_async_device_register(struct dma_device *device) !device->device_prep_dma_cyclic); BUG_ON(dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && !device->device_prep_interleaved_dma); + BUG_ON(dma_has_cap(DMA_CRC32C, device->cap_mask) && + !device->device_prep_dma_crc32c); BUG_ON(!device->device_tx_status); BUG_ON(!device->device_issue_pending); diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 7ea9184..7108d7c 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -74,6 +74,7 @@ enum dma_transaction_type { DMA_SLAVE, DMA_CYCLIC, DMA_INTERLEAVE, + DMA_CRC32C, /* last transaction type for creation of the capabilities mask */ DMA_TX_TYPE_END, }; @@ -645,6 +646,7 @@ enum dmaengine_alignment { * The function takes a buffer of size buf_len. The callback function will * be called after period_len bytes have been transferred. * @device_prep_interleaved_dma: Transfer expression in a generic way. + * @device_prep_dma_crc32c: prepares a crc32c operation * @device_config: Pushes a new configuration to a channel, return 0 or an error * code * @device_pause: Pauses any transfer happening on a channel. Returns @@ -727,6 +729,9 @@ struct dma_device { struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)( struct dma_chan *chan, struct dma_interleaved_template *xt, unsigned long flags); + struct dma_async_tx_descriptor *(*device_prep_dma_crc32c)( + struct dma_chan *chan, struct scatterlist *src_sg, size_t len, + unsigned int seed, u8 *result, unsigned long flags); int (*device_config)(struct dma_chan *chan, struct dma_slave_config *config); @@ -824,6 +829,14 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_sg( src_sg, src_nents, flags); } +static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_crc3c( + struct dma_chan *chan, struct scatterlist *src_sg, + size_t len, unsigned int seed, u8 *result, unsigned long flags) +{ + return chan->device->device_prep_dma_crc32c(chan, src_sg, len, + seed, result, flags); +} + static inline int dmaengine_terminate_all(struct dma_chan *chan) { if (chan->device->device_terminate_all)