From patchwork Mon Feb 22 16:03:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 8379241 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 968A7C0553 for ; Mon, 22 Feb 2016 16:04:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 90D2520515 for ; Mon, 22 Feb 2016 16:04:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 04C2820519 for ; Mon, 22 Feb 2016 16:04:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752365AbcBVQEX (ORCPT ); Mon, 22 Feb 2016 11:04:23 -0500 Received: from mga01.intel.com ([192.55.52.88]:26484 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753620AbcBVQET (ORCPT ); Mon, 22 Feb 2016 11:04:19 -0500 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 22 Feb 2016 08:04:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,485,1449561600"; d="scan'208";a="921313114" Received: from black.fi.intel.com ([10.237.72.93]) by fmsmga002.fm.intel.com with ESMTP; 22 Feb 2016 08:03:58 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id D5CF421F; Mon, 22 Feb 2016 18:03:51 +0200 (EET) From: Andy Shevchenko To: Viresh Kumar , Andy Shevchenko , Vinod Koul , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, Rob Herring , Hans-Christian Egtvedt , Tejun Heo , Mark Brown , Greg Kroah-Hartman , Mark Rutland , Vineet Gupta Cc: Mans Rullgard Subject: [PATCH v2 06/15] dmaengine: dw: substitute dma_read_byaddr by dma_readl_native Date: Mon, 22 Feb 2016 18:03:41 +0200 Message-Id: <1456157030-54677-7-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1456157030-54677-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1456157030-54677-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Since struct dw_dma is allocated and regs member is assigned properly we can use standard IO accessors to the DMA registers. Signed-off-by: Andy Shevchenko Signed-off-by: Mans Rullgard --- drivers/dma/dw/core.c | 8 +++----- drivers/dma/dw/regs.h | 4 ---- 2 files changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index 90299fe..d53e997 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -1518,7 +1518,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) pm_runtime_get_sync(chip->dev); if (!pdata) { - dw_params = dma_read_byaddr(chip->regs, DW_PARAMS); + dw_params = dma_readl(dw, DW_PARAMS); dev_dbg(chip->dev, "DW_PARAMS: 0x%08x\n", dw_params); autocfg = dw_params >> DW_PARAMS_EN & 1; @@ -1618,11 +1618,9 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) /* Hardware configuration */ if (autocfg) { - unsigned int dwc_params; unsigned int r = DW_DMA_MAX_NR_CHANNELS - i - 1; - void __iomem *addr = chip->regs + r * sizeof(u32); - - dwc_params = dma_read_byaddr(addr, DWC_PARAMS); + void __iomem *addr = &__dw_regs(dw)->DWC_PARAMS[r]; + unsigned int dwc_params = dma_readl_native(addr); dev_dbg(chip->dev, "DWC_PARAMS[%d]: 0x%08x\n", i, dwc_params); diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h index 59d6cec..feb3a4a 100644 --- a/drivers/dma/dw/regs.h +++ b/drivers/dma/dw/regs.h @@ -114,10 +114,6 @@ struct dw_dma_regs { #define dma_writel_native writel #endif -/* To access the registers in early stage of probe */ -#define dma_read_byaddr(addr, name) \ - dma_readl_native((addr) + offsetof(struct dw_dma_regs, name)) - /* Bitfields in DW_PARAMS */ #define DW_PARAMS_NR_CHAN 8 /* number of channels */ #define DW_PARAMS_NR_MASTER 11 /* number of AHB masters */