From patchwork Fri Mar 18 14:24:42 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 8620441 Return-Path: X-Original-To: patchwork-dmaengine@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3C632C0553 for ; Fri, 18 Mar 2016 14:32:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 716C120108 for ; Fri, 18 Mar 2016 14:32:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8C8BA20149 for ; Fri, 18 Mar 2016 14:32:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933659AbcCROZF (ORCPT ); Fri, 18 Mar 2016 10:25:05 -0400 Received: from mga02.intel.com ([134.134.136.20]:11742 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933647AbcCROZC (ORCPT ); Fri, 18 Mar 2016 10:25:02 -0400 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 18 Mar 2016 07:25:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,355,1455004800"; d="scan'208";a="940202257" Received: from black.fi.intel.com ([10.237.72.93]) by fmsmga002.fm.intel.com with ESMTP; 18 Mar 2016 07:24:57 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 931A35B3; Fri, 18 Mar 2016 16:24:56 +0200 (EET) From: Andy Shevchenko To: Viresh Kumar , Andy Shevchenko , Vinod Koul , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, Rob Herring , Hans-Christian Egtvedt , Tejun Heo , Mark Brown , Greg Kroah-Hartman , Mark Rutland , Vineet Gupta Cc: Mans Rullgard Subject: [PATCH v3 03/15] dmaengine: dw: set src and dst master select according to xfer direction Date: Fri, 18 Mar 2016 16:24:42 +0200 Message-Id: <1458311094-94927-4-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1458311094-94927-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1458311094-94927-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Mans Rullgard On some architectures the DMA controller can have two masters connected to different buses and thus access to memory is possible only through one and to peripheral through the other. This patch changes the src and dst master setting to match the direction of the transfer. Signed-off-by: Mans Rullgard Acked-by: Andy Shevchenko --- drivers/dma/dw/core.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index 9112891..66d8276 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -45,13 +45,17 @@ DW_DMA_MSIZE_16; \ u8 _dmsize = _is_slave ? _sconfig->dst_maxburst : \ DW_DMA_MSIZE_16; \ + u8 _dms = (_dwc->direction == DMA_MEM_TO_DEV) ? \ + _dwc->p_master : _dwc->m_master; \ + u8 _sms = (_dwc->direction == DMA_DEV_TO_MEM) ? \ + _dwc->p_master : _dwc->m_master; \ \ (DWC_CTLL_DST_MSIZE(_dmsize) \ | DWC_CTLL_SRC_MSIZE(_smsize) \ | DWC_CTLL_LLP_D_EN \ | DWC_CTLL_LLP_S_EN \ - | DWC_CTLL_DMS(_dwc->p_master) \ - | DWC_CTLL_SMS(_dwc->m_master)); \ + | DWC_CTLL_DMS(_dms) \ + | DWC_CTLL_SMS(_sms)); \ }) /*