From patchwork Fri Aug 12 16:01:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 9277359 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 344C5600CB for ; Fri, 12 Aug 2016 16:05:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2546C28A5C for ; Fri, 12 Aug 2016 16:05:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1A15A28A82; Fri, 12 Aug 2016 16:05:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ABC8928A5C for ; Fri, 12 Aug 2016 16:05:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752885AbcHLQFS (ORCPT ); Fri, 12 Aug 2016 12:05:18 -0400 Received: from mga02.intel.com ([134.134.136.20]:43521 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752768AbcHLQDF (ORCPT ); Fri, 12 Aug 2016 12:03:05 -0400 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 12 Aug 2016 09:02:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,511,1464678000"; d="scan'208";a="1034539230" Received: from black.fi.intel.com ([10.237.72.93]) by orsmga002.jf.intel.com with ESMTP; 12 Aug 2016 09:02:03 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 5428334C; Fri, 12 Aug 2016 19:01:57 +0300 (EEST) From: Andy Shevchenko To: Bryan O'Donoghue , Peter Hurley , linux-serial@vger.kernel.org, Vinod Koul , linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, Greg Kroah-Hartman , ismo.puustinen@intel.com, Heikki Krogerus , Eugeniy Paltsev Cc: Andy Shevchenko Subject: [PATCH v10 10/11] serial: 8250_lpss: enable MSI for Intel Quark Date: Fri, 12 Aug 2016 19:01:55 +0300 Message-Id: <1471017716-44893-11-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1471017716-44893-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1471017716-44893-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Intel Quark SoC supports MSI for LPSS, in particular for UART. Enable MSI for Intel Quark. Signed-off-by: Andy Shevchenko Reviewed-by: Bryan O'Donoghue --- drivers/tty/serial/8250/8250_lpss.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/tty/serial/8250/8250_lpss.c b/drivers/tty/serial/8250/8250_lpss.c index cad96ee..5ac291c 100644 --- a/drivers/tty/serial/8250/8250_lpss.c +++ b/drivers/tty/serial/8250/8250_lpss.c @@ -151,6 +151,17 @@ static int byt_serial_setup(struct lpss8250 *lpss, struct uart_port *port) return 0; } +static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port) +{ + struct pci_dev *pdev = to_pci_dev(port->dev); + + pci_enable_msi(pdev); + + port->irq = pdev->irq; + + return 0; +} + static bool lpss8250_dma_filter(struct dma_chan *chan, void *param) { struct dw_dma_slave *dws = param; @@ -261,6 +272,7 @@ static const struct lpss8250_board byt_board = { static const struct lpss8250_board qrk_board = { .freq = 44236800, .base_baud = 2764800, + .setup = qrk_serial_setup, }; #define LPSS_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }