diff mbox

[v2] dma: imx-sdma: add 1ms delay to ensure SDMA channel is stopped

Message ID 1489731129-3166-2-git-send-email-jiada_wang@mentor.com (mailing list archive)
State Accepted
Headers show

Commit Message

Wang, Jiada March 17, 2017, 6:12 a.m. UTC 
From: Jiada Wang <jiada_wang@mentor.com>

sdma_disable_channel() cannot ensure dma is stopped to access
module's FIFOs. There is chance SDMA core is running and accessing
BD when disable of corresponding channel, this may cause sometimes
even after call of .sdma_disable_channel(), SDMA core still be
running and accessing module's FIFOs.

According to NXP R&D team a delay of one BD SDMA cost time (maximum
is 1ms) should be added after disable of the channel bit, to ensure
SDMA core has really been stopped after SDMA clients call
.device_terminate_all.

This patch introduces adds a new function sdma_disable_channel_with_delay()
which simply adds 1ms delay after call sdma_disable_channel(),
and set it as .device_terminate_all.

Signed-off-by: Jiada Wang <jiada_wang@mentor.com>
---
 drivers/dma/imx-sdma.c |   17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

Comments

Vinod Koul March 27, 2017, 5:21 a.m. UTC | #1 
On Thu, Mar 16, 2017 at 11:12:09PM -0700, jiada_wang@mentor.com wrote:
> From: Jiada Wang <jiada_wang@mentor.com>
> 
> sdma_disable_channel() cannot ensure dma is stopped to access
> module's FIFOs. There is chance SDMA core is running and accessing
> BD when disable of corresponding channel, this may cause sometimes
> even after call of .sdma_disable_channel(), SDMA core still be
> running and accessing module's FIFOs.
> 
> According to NXP R&D team a delay of one BD SDMA cost time (maximum
> is 1ms) should be added after disable of the channel bit, to ensure
> SDMA core has really been stopped after SDMA clients call
> .device_terminate_all.
> 
> This patch introduces adds a new function sdma_disable_channel_with_delay()
> which simply adds 1ms delay after call sdma_disable_channel(),
> and set it as .device_terminate_all.

Applied after fixing the subsystem name.
diff mbox

Patch

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index d1651a5..21726a2 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -937,6 +937,21 @@  static int sdma_disable_channel(struct dma_chan *chan)
 	return 0;
 }
 
+static int sdma_disable_channel_with_delay(struct dma_chan *chan)
+{
+	sdma_disable_channel(chan);
+
+	/*
+	 * According to NXP R&D team a delay of one BD SDMA cost time
+	 * (maximum is 1ms) should be added after disable of the channel
+	 * bit, to ensure SDMA core has really been stopped after SDMA
+	 * clients call .device_terminate_all.
+	 */
+	mdelay(1);
+
+	return 0;
+}
+
 static void sdma_set_watermarklevel_for_p2p(struct sdma_channel *sdmac)
 {
 	struct sdma_engine *sdma = sdmac->sdma;
@@ -1828,7 +1843,7 @@  static int sdma_probe(struct platform_device *pdev)
 	sdma->dma_device.device_prep_slave_sg = sdma_prep_slave_sg;
 	sdma->dma_device.device_prep_dma_cyclic = sdma_prep_dma_cyclic;
 	sdma->dma_device.device_config = sdma_config;
-	sdma->dma_device.device_terminate_all = sdma_disable_channel;
+	sdma->dma_device.device_terminate_all = sdma_disable_channel_with_delay;
 	sdma->dma_device.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
 	sdma->dma_device.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
 	sdma->dma_device.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);