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Tue, 10 Mar 2020 03:31:16 +0000 From: Robin Gong To: s.hauer@pengutronix.de, vkoul@kernel.org, shawnguo@kernel.org, u.kleine-koenig@pengutronix.de, broonie@kernel.org, robh+dt@kernel.org, festevam@gmail.com, dan.j.williams@intel.com, mark.rutland@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, l.stach@pengutronix.de, martin.fuzzey@flowbird.group Cc: kernel@pengutronix.de, linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com, dmaengine@vger.kernel.org, devicetree@vger.kernel.org Subject: [RESEND v6 07/13] spi: imx: remove ERR009165 workaround on i.mx6ul Date: Tue, 10 Mar 2020 19:31:56 +0800 Message-Id: <1583839922-22699-8-git-send-email-yibin.gong@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1583839922-22699-1-git-send-email-yibin.gong@nxp.com> References: <1583839922-22699-1-git-send-email-yibin.gong@nxp.com> X-ClientProxiedBy: SG2PR06CA0241.apcprd06.prod.outlook.com (2603:1096:4:ac::25) To VE1PR04MB6638.eurprd04.prod.outlook.com (2603:10a6:803:119::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from robin-OptiPlex-790.ap.freescale.net (119.31.174.66) by SG2PR06CA0241.apcprd06.prod.outlook.com (2603:1096:4:ac::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.2793.15 via Frontend Transport; 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All other i.mx6/7 and i.mx8m/8mm still need this errata. Please refer to nxp official errata document from https://www.nxp.com/ . For removing workaround on those chips. Add new i.mx6ul type. Signed-off-by: Robin Gong Acked-by: Mark Brown --- drivers/spi/spi-imx.c | 50 +++++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 45 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 842a86e..f7ee2ec 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -57,6 +57,7 @@ enum spi_imx_devtype { IMX35_CSPI, /* CSPI on all i.mx except above */ IMX51_ECSPI, /* ECSPI on i.mx51 */ IMX53_ECSPI, /* ECSPI on i.mx53 and later */ + IMX6UL_ECSPI, /* ERR009165 fix from i.mx6ul */ }; struct spi_imx_data; @@ -75,6 +76,11 @@ struct spi_imx_devtype_data { bool has_slavemode; unsigned int fifo_size; bool dynamic_burst; + /* + * ERR009165 fixed or not: + * https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf + */ + bool tx_glitch_fixed; enum spi_imx_devtype devtype; }; @@ -128,7 +134,8 @@ static inline int is_imx35_cspi(struct spi_imx_data *d) static inline int is_imx51_ecspi(struct spi_imx_data *d) { - return d->devtype_data->devtype == IMX51_ECSPI; + return d->devtype_data->devtype == IMX51_ECSPI || + d->devtype_data->devtype == IMX6UL_ECSPI; } static inline int is_imx53_ecspi(struct spi_imx_data *d) @@ -585,9 +592,16 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk); spi_imx->spi_bus_clk = clk; - /* ERR009165: work in XHC mode as PIO */ - if (spi_imx->usedma) - ctrl &= ~MX51_ECSPI_CTRL_SMC; + /* + * ERR009165: work in XHC mode instead of SMC as PIO on the chips + * before i.mx6ul. + */ + if (spi_imx->usedma) { + if (spi_imx->devtype_data->tx_glitch_fixed) + ctrl |= MX51_ECSPI_CTRL_SMC; + else + ctrl &= ~MX51_ECSPI_CTRL_SMC; + } writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); @@ -615,6 +629,8 @@ static void mx51_setup_wml(struct spi_imx_data *spi_imx) { u32 tx_wml = 0; + if (spi_imx->devtype_data->tx_glitch_fixed) + tx_wml = spi_imx->wml; /* * Configure the DMA register: setup the watermark * and enable DMA request. @@ -1012,6 +1028,23 @@ static struct spi_imx_devtype_data imx53_ecspi_devtype_data = { .devtype = IMX53_ECSPI, }; +static struct spi_imx_devtype_data imx6ul_ecspi_devtype_data = { + .intctrl = mx51_ecspi_intctrl, + .prepare_message = mx51_ecspi_prepare_message, + .prepare_transfer = mx51_ecspi_prepare_transfer, + .trigger = mx51_ecspi_trigger, + .rx_available = mx51_ecspi_rx_available, + .reset = mx51_ecspi_reset, + .setup_wml = mx51_setup_wml, + .fifo_size = 64, + .has_dmamode = true, + .dynamic_burst = true, + .has_slavemode = true, + .tx_glitch_fixed = true, + .disable = mx51_ecspi_disable, + .devtype = IMX6UL_ECSPI, +}; + static const struct platform_device_id spi_imx_devtype[] = { { .name = "imx1-cspi", @@ -1035,6 +1068,9 @@ static const struct platform_device_id spi_imx_devtype[] = { .name = "imx53-ecspi", .driver_data = (kernel_ulong_t) &imx53_ecspi_devtype_data, }, { + .name = "imx6ul-ecspi", + .driver_data = (kernel_ulong_t) &imx6ul_ecspi_devtype_data, + }, { /* sentinel */ } }; @@ -1047,6 +1083,7 @@ static const struct of_device_id spi_imx_dt_ids[] = { { .compatible = "fsl,imx35-cspi", .data = &imx35_cspi_devtype_data, }, { .compatible = "fsl,imx51-ecspi", .data = &imx51_ecspi_devtype_data, }, { .compatible = "fsl,imx53-ecspi", .data = &imx53_ecspi_devtype_data, }, + { .compatible = "fsl,imx6ul-ecspi", .data = &imx6ul_ecspi_devtype_data, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, spi_imx_dt_ids); @@ -1178,7 +1215,10 @@ static int spi_imx_dma_configure(struct spi_master *master) * For ERR009165 with tx_wml = 0 could enlarge burst size to fifo size * to speed up fifo filling as possible. */ - tx.dst_maxburst = spi_imx->devtype_data->fifo_size; + if (spi_imx->devtype_data->tx_glitch_fixed) + tx.dst_maxburst = spi_imx->wml; + else + tx.dst_maxburst = spi_imx->devtype_data->fifo_size; ret = dmaengine_slave_config(master->dma_tx, &tx); if (ret) { dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret);