diff mbox series

[v2,3/9] dmaengine: fsl-edma-common: add fsl_chan into fsl_edma_fill_tcd

Message ID 1594748508-22179-4-git-send-email-yibin.gong@nxp.com (mailing list archive)
State Changes Requested
Headers show
Series add fsl-edma3 support | expand

Commit Message

Robin Gong July 14, 2020, 5:41 p.m. UTC 
For preparing for next edma3 merged so that any member of 'struct fsl_chan'
could be used in fsl_edma_fill_tcd.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
---
 drivers/dma/fsl-edma-common.c | 25 +++++++++++++------------
 1 file changed, 13 insertions(+), 12 deletions(-)
diff mbox series

Patch

diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
index d19e8a8..6ef083c 100644
--- a/drivers/dma/fsl-edma-common.c
+++ b/drivers/dma/fsl-edma-common.c
@@ -376,7 +376,8 @@  static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan,
 }
 
 static inline
-void fsl_edma_fill_tcd(struct fsl_edma_hw_tcd *tcd, u32 src, u32 dst,
+void fsl_edma_fill_tcd(struct fsl_edma_chan *fsl_chan,
+		       struct fsl_edma_hw_tcd *tcd, u32 src, u32 dst,
 		       u16 attr, u16 soff, u32 nbytes, u32 slast, u16 citer,
 		       u16 biter, u16 doff, u32 dlast_sga, bool major_int,
 		       bool disable_req, bool enable_sg)
@@ -504,9 +505,9 @@  struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic(
 			doff = fsl_chan->cfg.src_addr_width;
 		}
 
-		fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr, dst_addr,
-				  fsl_chan->attr, soff, nbytes, 0, iter,
-				  iter, doff, last_sg, true, false, true);
+		fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd, src_addr,
+				  dst_addr, fsl_chan->attr, soff, nbytes, 0,
+				  iter, iter, doff, last_sg, true, false, true);
 		dma_buf_next += period_len;
 	}
 
@@ -569,16 +570,16 @@  struct dma_async_tx_descriptor *fsl_edma_prep_slave_sg(
 		iter = sg_dma_len(sg) / nbytes;
 		if (i < sg_len - 1) {
 			last_sg = fsl_desc->tcd[(i + 1)].ptcd;
-			fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr,
-					  dst_addr, fsl_chan->attr, soff,
-					  nbytes, 0, iter, iter, doff, last_sg,
-					  false, false, true);
+			fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd,
+					  src_addr, dst_addr, fsl_chan->attr,
+					  soff, nbytes, 0, iter, iter, doff,
+					  last_sg, false, false, true);
 		} else {
 			last_sg = 0;
-			fsl_edma_fill_tcd(fsl_desc->tcd[i].vtcd, src_addr,
-					  dst_addr, fsl_chan->attr, soff,
-					  nbytes, 0, iter, iter, doff, last_sg,
-					  true, true, false);
+			fsl_edma_fill_tcd(fsl_chan, fsl_desc->tcd[i].vtcd,
+					  src_addr, dst_addr, fsl_chan->attr,
+					  soff, nbytes, 0, iter, iter, doff,
+					  last_sg, true, true, false);
 		}
 	}