Message ID | 1691387509-2113129-7-git-send-email-radhey.shyam.pandey@amd.com (mailing list archive) |
---|---|
State | Accepted |
Commit | c77d4c5081aa6508623be876afebff003a2e5875 |
Headers | show
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Sun, 6 Aug 2023 22:52:45 -0700 Received: from xhdradheys41.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.27 via Frontend Transport; Mon, 7 Aug 2023 00:52:41 -0500 From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> To: <vkoul@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <michal.simek@amd.com>, <davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>, <pabeni@redhat.com>, <linux@armlinux.org.uk> CC: <dmaengine@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <netdev@vger.kernel.org>, <git@amd.com>, Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Subject: [PATCH net-next v5 06/10] dmaengine: xilinx_dma: Use tasklet_hi_schedule for timing critical usecase Date: Mon, 7 Aug 2023 11:21:45 +0530 Message-ID: <1691387509-2113129-7-git-send-email-radhey.shyam.pandey@amd.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1691387509-2113129-1-git-send-email-radhey.shyam.pandey@amd.com> References: <1691387509-2113129-1-git-send-email-radhey.shyam.pandey@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044EE:EE_|CY5PR12MB6526:EE_ X-MS-Office365-Filtering-Correlation-Id: 6391a4c5-f507-419e-3489-08db970a8868 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Series |
net: axienet: Introduce dmaengine
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expand
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diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index 3b721da827e0..6c1c63a38f70 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -1850,7 +1850,7 @@ static irqreturn_t xilinx_mcdma_irq_handler(int irq, void *data) spin_unlock(&chan->lock); } - tasklet_schedule(&chan->tasklet); + tasklet_hi_schedule(&chan->tasklet); return IRQ_HANDLED; }
Schedule tasklet with high priority to ensure that callback processing is prioritized. It improves throughput for netdev dma clients. Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> --- Changes for v5: - New patch in this series. Just a note that dmaengine series was earlier sent as separate series[1] and now it's merged with axiethernet series[2]. [1]: https://lore.kernel.org/all/20221124102745.2620370-1-sarath.babu.naidu.gaddam@amd.com [2]: https://lore.kernel.org/all/20230630053844.1366171-1-sarath.babu.naidu.gaddam@amd.com - Switch to amd.com email address. --- drivers/dma/xilinx/xilinx_dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)