From patchwork Fri Sep 9 19:57:36 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 9324243 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 188C660231 for ; Fri, 9 Sep 2016 19:58:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0937329FE8 for ; Fri, 9 Sep 2016 19:58:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id F25992A00D; Fri, 9 Sep 2016 19:58:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A057129FE8 for ; Fri, 9 Sep 2016 19:58:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753451AbcIIT6M (ORCPT ); Fri, 9 Sep 2016 15:58:12 -0400 Received: from mga09.intel.com ([134.134.136.24]:1860 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753269AbcIIT6L (ORCPT ); Fri, 9 Sep 2016 15:58:11 -0400 Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP; 09 Sep 2016 12:58:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,306,1470726000"; d="scan'208";a="166352395" Received: from black.fi.intel.com ([10.237.72.56]) by fmsmga004.fm.intel.com with ESMTP; 09 Sep 2016 12:58:10 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id A7FB316B; Fri, 9 Sep 2016 22:57:37 +0300 (EEST) From: Andy Shevchenko To: dmaengine@vger.kernel.org, Vinod Koul Cc: Andy Shevchenko Subject: [PATCH v1 5/5] dmaengine: dw: we do support Merrifield SoC in PCI mode Date: Fri, 9 Sep 2016 22:57:36 +0300 Message-Id: <20160909195736.100757-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20160909195736.100757-1-andriy.shevchenko@linux.intel.com> References: <20160909195736.100757-1-andriy.shevchenko@linux.intel.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Intel Merrifiel SoC contains Intel integrated DMA (iDMA 32-bit) which has a slightly different register mapping, e.g. some bits in CTL_* and CFG_* channel registers, and has to use platform data since there is no autoconfiguration. The iDMA 32-bit specification is available in the open documentation for Intel BayTrail SoC as LPE Audio DMA. Signed-off-by: Andy Shevchenko --- drivers/dma/dw/pci.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/dma/dw/pci.c b/drivers/dma/dw/pci.c index 0ae6c3b..0b14208 100644 --- a/drivers/dma/dw/pci.c +++ b/drivers/dma/dw/pci.c @@ -15,6 +15,18 @@ #include "internal.h" +static struct dw_dma_platform_data mrfld_pdata = { + .nr_channels = 8, + .is_private = true, + .is_memcpy = true, + .is_idma32 = true, + .chan_allocation_order = CHAN_ALLOCATION_ASCENDING, + .chan_priority = CHAN_PRIORITY_ASCENDING, + .block_size = 16383, + .nr_masters = 1, + .data_width = {4}, +}; + static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid) { const struct dw_dma_platform_data *pdata = (void *)pid->driver_data; @@ -103,6 +115,9 @@ static const struct pci_device_id dw_pci_id_table[] = { { PCI_VDEVICE(INTEL, 0x0f06) }, { PCI_VDEVICE(INTEL, 0x0f40) }, + /* Merrifield iDMA 32-bit (GPDMA) */ + { PCI_VDEVICE(INTEL, 0x11a2), (kernel_ulong_t)&mrfld_pdata }, + /* Braswell */ { PCI_VDEVICE(INTEL, 0x2286) }, { PCI_VDEVICE(INTEL, 0x22c0) },