From patchwork Tue Jul 3 12:32:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 10503979 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3412760225 for ; Tue, 3 Jul 2018 12:40:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 25636287C6 for ; Tue, 3 Jul 2018 12:40:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 197C428815; Tue, 3 Jul 2018 12:40:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9C6CE2881D for ; Tue, 3 Jul 2018 12:40:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753405AbeGCMkt (ORCPT ); Tue, 3 Jul 2018 08:40:49 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:57886 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753417AbeGCMko (ORCPT ); Tue, 3 Jul 2018 08:40:44 -0400 From: Paul Cercueil To: Vinod Koul , Rob Herring , Mark Rutland , Ralf Baechle , Paul Burton , James Hogan , Zubair Lutfullah Kakakhel Cc: Mathieu Malaterre , Daniel Silsby , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@linux-mips.org, Paul Cercueil Subject: [PATCH 06/14] dmaengine: dma-jz4780: Add support for the JZ4725B SoC Date: Tue, 3 Jul 2018 14:32:06 +0200 Message-Id: <20180703123214.23090-7-paul@crapouillou.net> In-Reply-To: <20180703123214.23090-1-paul@crapouillou.net> References: <20180703123214.23090-1-paul@crapouillou.net> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1530621155; bh=JZYF8f7nUzfetLcg8Rk2QXtCZlzg0IklxLdEOqwCOSs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=Kg1L2pJSnv/bfsPP4kcqlleEYItgeyZ1e24NPkECAwDqFoeBzTypFi4y+EJ4FI/u3fvwOeGgtCpbd89t4w5a32lV/+Bz66AkYHE/tdl80Kg8rJpufAgxUDou2sBO+C+27jsdgngKTVhD/fSWd+/9Xe1lKwxRYp3AsSutmVfpVvU= Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The JZ4725B has one DMA core starring six DMA channels. As for the JZ4770, each DMA channel's clock can be enabled with a register write, the difference here being that once started, it is not possible to turn it off. Signed-off-by: Paul Cercueil Reviewed-by: PrasannaKumar Muralidharan --- Documentation/devicetree/bindings/dma/jz4780-dma.txt | 1 + drivers/dma/dma-jz4780.c | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/jz4780-dma.txt b/Documentation/devicetree/bindings/dma/jz4780-dma.txt index d7ca3f925fdf..5d302b488e88 100644 --- a/Documentation/devicetree/bindings/dma/jz4780-dma.txt +++ b/Documentation/devicetree/bindings/dma/jz4780-dma.txt @@ -5,6 +5,7 @@ Required properties: - compatible: Should be one of: * ingenic,jz4780-dma * ingenic,jz4770-dma + * ingenic,jz4725b-dma * ingenic,jz4740-dma - reg: Should contain the DMA channel registers location and length, followed by the DMA controller registers location and length. diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c index ccadbe61dde7..922e4031e70e 100644 --- a/drivers/dma/dma-jz4780.c +++ b/drivers/dma/dma-jz4780.c @@ -134,6 +134,7 @@ struct jz4780_dma_chan { enum jz_version { ID_JZ4740, + ID_JZ4725B, ID_JZ4770, ID_JZ4780, }; @@ -204,6 +205,8 @@ static inline void jz4780_dma_chan_enable(struct jz4780_dma_dev *jzdma, { if (jzdma->version == ID_JZ4770) jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKES, BIT(chn)); + else if (jzdma->version == ID_JZ4725B) + jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKE, BIT(chn)); } static inline void jz4780_dma_chan_disable(struct jz4780_dma_dev *jzdma, @@ -249,6 +252,7 @@ static void jz4780_dma_desc_free(struct virt_dma_desc *vdesc) static const unsigned int jz4780_dma_ord_max[] = { [ID_JZ4740] = 5, + [ID_JZ4725B] = 5, [ID_JZ4770] = 6, [ID_JZ4780] = 7, }; @@ -804,12 +808,14 @@ static struct dma_chan *jz4780_of_dma_xlate(struct of_phandle_args *dma_spec, static const unsigned int jz4780_dma_nb_channels[] = { [ID_JZ4740] = 6, + [ID_JZ4725B] = 6, [ID_JZ4770] = 6, [ID_JZ4780] = 32, }; static const struct of_device_id jz4780_dma_dt_match[] = { { .compatible = "ingenic,jz4740-dma", .data = (void *)ID_JZ4740 }, + { .compatible = "ingenic,jz4725b-dma", .data = (void *)ID_JZ4725B }, { .compatible = "ingenic,jz4770-dma", .data = (void *)ID_JZ4770 }, { .compatible = "ingenic,jz4780-dma", .data = (void *)ID_JZ4780 }, {},