diff mbox series

[v4,6/6] arm64: dts: zynqmp: Add DPDMA node

Message ID 20200513165943.25120-7-laurent.pinchart@ideasonboard.com (mailing list archive)
State Changes Requested
Headers show
Series dma: Add Xilinx ZynqMP DPDMA driver | expand

Commit Message

Laurent Pinchart May 13, 2020, 4:59 p.m. UTC
Add a DT node for the DisplayPort DMA engine (DPDMA).

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi |  4 ++++
 arch/arm64/boot/dts/xilinx/zynqmp.dtsi         | 10 ++++++++++
 2 files changed, 14 insertions(+)

Comments

Michal Simek May 14, 2020, 5:56 a.m. UTC | #1
On 13. 05. 20 18:59, Laurent Pinchart wrote:
> Add a DT node for the DisplayPort DMA engine (DPDMA).
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi |  4 ++++
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi         | 10 ++++++++++
>  2 files changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> index 9868ca15dfc5..32c4914738d9 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> @@ -57,6 +57,10 @@ &cpu0 {
>  	clocks = <&zynqmp_clk ACPU>;
>  };
>  
> +&dpdma {
> +	clocks = <&zynqmp_clk DPDMA_REF>;
> +};
> +
>  &fpd_dma_chan1 {
>  	clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
>  };
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 26d926eb1431..2e284eb8d3c1 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -246,6 +246,16 @@ pmu@9000 {
>  			};
>  		};
>  
> +		dpdma: dma-controller@fd4c0000 {
> +			compatible = "xlnx,zynqmp-dpdma";
> +			status = "disabled";
> +			reg = <0x0 0xfd4c0000 0x0 0x1000>;
> +			interrupts = <0 122 4>;
> +			interrupt-parent = <&gic>;
> +			clock-names = "axi_clk";
> +			#dma-cells = <1>;
> +		};
> +
>  		/* GDMA */
>  		fpd_dma_chan1: dma@fd500000 {
>  			status = "disabled";
> 

Acked-by: Michal Simek <michal.simek@xilinx.com>

Feel free to take it with this series. Or let me know if you want me to
take it via my soc tree.

Thanks,
Michal
Laurent Pinchart May 28, 2020, 2:49 a.m. UTC | #2
Hi Michal,

On Thu, May 14, 2020 at 07:56:47AM +0200, Michal Simek wrote:
> On 13. 05. 20 18:59, Laurent Pinchart wrote:
> > Add a DT node for the DisplayPort DMA engine (DPDMA).
> > 
> > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> > ---
> >  arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi |  4 ++++
> >  arch/arm64/boot/dts/xilinx/zynqmp.dtsi         | 10 ++++++++++
> >  2 files changed, 14 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> > index 9868ca15dfc5..32c4914738d9 100644
> > --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> > +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> > @@ -57,6 +57,10 @@ &cpu0 {
> >  	clocks = <&zynqmp_clk ACPU>;
> >  };
> >  
> > +&dpdma {
> > +	clocks = <&zynqmp_clk DPDMA_REF>;
> > +};
> > +
> >  &fpd_dma_chan1 {
> >  	clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
> >  };
> > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> > index 26d926eb1431..2e284eb8d3c1 100644
> > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> > @@ -246,6 +246,16 @@ pmu@9000 {
> >  			};
> >  		};
> >  
> > +		dpdma: dma-controller@fd4c0000 {
> > +			compatible = "xlnx,zynqmp-dpdma";
> > +			status = "disabled";
> > +			reg = <0x0 0xfd4c0000 0x0 0x1000>;
> > +			interrupts = <0 122 4>;
> > +			interrupt-parent = <&gic>;
> > +			clock-names = "axi_clk";
> > +			#dma-cells = <1>;
> > +		};
> > +
> >  		/* GDMA */
> >  		fpd_dma_chan1: dma@fd500000 {
> >  			status = "disabled";
> > 
> 
> Acked-by: Michal Simek <michal.simek@xilinx.com>
> 
> Feel free to take it with this series. Or let me know if you want me to
> take it via my soc tree.

If we ever find an agreement on the DMA engine API :-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
index 9868ca15dfc5..32c4914738d9 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
@@ -57,6 +57,10 @@  &cpu0 {
 	clocks = <&zynqmp_clk ACPU>;
 };
 
+&dpdma {
+	clocks = <&zynqmp_clk DPDMA_REF>;
+};
+
 &fpd_dma_chan1 {
 	clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
 };
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 26d926eb1431..2e284eb8d3c1 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -246,6 +246,16 @@  pmu@9000 {
 			};
 		};
 
+		dpdma: dma-controller@fd4c0000 {
+			compatible = "xlnx,zynqmp-dpdma";
+			status = "disabled";
+			reg = <0x0 0xfd4c0000 0x0 0x1000>;
+			interrupts = <0 122 4>;
+			interrupt-parent = <&gic>;
+			clock-names = "axi_clk";
+			#dma-cells = <1>;
+		};
+
 		/* GDMA */
 		fpd_dma_chan1: dma@fd500000 {
 			status = "disabled";