Message ID | 20200528025228.31638-7-laurent.pinchart@ideasonboard.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | dma: Add Xilinx ZynqMP DPDMA driver | expand |
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi index 9868ca15dfc5..32c4914738d9 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi @@ -57,6 +57,10 @@ &cpu0 { clocks = <&zynqmp_clk ACPU>; }; +&dpdma { + clocks = <&zynqmp_clk DPDMA_REF>; +}; + &fpd_dma_chan1 { clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>; }; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 26d926eb1431..2e284eb8d3c1 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -246,6 +246,16 @@ pmu@9000 { }; }; + dpdma: dma-controller@fd4c0000 { + compatible = "xlnx,zynqmp-dpdma"; + status = "disabled"; + reg = <0x0 0xfd4c0000 0x0 0x1000>; + interrupts = <0 122 4>; + interrupt-parent = <&gic>; + clock-names = "axi_clk"; + #dma-cells = <1>; + }; + /* GDMA */ fpd_dma_chan1: dma@fd500000 { status = "disabled";