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Tue, 24 May 2022 08:05:20 +0000 From: Joy Zou To: vkoul@kernel.org Cc: shengjiu.wang@nxp.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 2/2] dmaengine: imx-sdma: support hdmi audio Date: Tue, 24 May 2022 16:06:40 +0800 Message-Id: <20220524080640.1322388-1-joy.zou@nxp.com> X-Mailer: git-send-email 2.25.1 X-ClientProxiedBy: SG2PR01CA0198.apcprd01.prod.exchangelabs.com (2603:1096:4:189::7) To AM6PR04MB5925.eurprd04.prod.outlook.com (2603:10a6:20b:ab::19) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e8957f47-256d-4301-afc6-08da3d5c256b X-MS-TrafficTypeDiagnostic: AM6PR04MB6293:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qwhtX7xeT7MQjrRJSh3jaRYugQ2cR/cIIjCl8AxVQ6R+P+wXOEHG+dMPB2KJvJGnptLuvoX80Nd9cNcbAd+KcKpyiyUVEL4xIWHQoKzmnqGhyMT7kUHgYrJEnhbxaQWHvx2dv5OjQx/lhEl/BPMC2lSHVWSX0EvQMNqGlo+NiUrClAf+OkS8XLt21l5Qt0yXsWUsfSagjaDiS44OCzmk+m3ByT5jY2NdnmRu/UnOmlxV7/VuoRXaozKmavXocDf0GGYQmgeP3sZkpCfIdgGgHSlxRnZ9xFXFCXFP87hSFWAEYzjlAyMQPFoS++KSPMbHVOx5G52pyf2ppcEDftIjzUnMdLoTSmiSsyGz2AT/BmsIQ2iHOz9L9eIOclBB28obuX7UDVsQKCbORm4M0yB761raZ6ngXIQmLe8WRHy2wDdSVAA5vb1ctAN//jzejvI7SFhYV5FBet4STSCTaI6rTPbhN2fFqxVK8LrBZoKExxdABI/ljU96NI5B044gybkpitwrtOQtCcjzvLeXRN2VqTbzAfqmoQykMSH9iWyLa1T1GERpV3sgbSF/kufCVqbpMIMu0TkXsaBmCdReAASL8kR/7ufGV6nI+cdqYT1BfS/am4FgihPPOS86iGfMO4ySL0qrvXk+g1VBTMsglUGYnEBDVSwcQpOvVrKHquhBd1R2d4h50pUSnmOePrytR9wVG1ko48AS6kZe4mfshEJsag== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM6PR04MB5925.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230001)(4636009)(366004)(26005)(6666004)(6512007)(6506007)(36756003)(2906002)(5660300002)(44832011)(2616005)(52116002)(83380400001)(1076003)(8676002)(186003)(8936002)(38350700002)(86362001)(38100700002)(6916009)(316002)(6486002)(66946007)(66556008)(4326008)(508600001)(66476007);DIR:OUT;SFP:1101; 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Signed-off-by: Joy Zou --- Changes since v1: moved data type to include/linux/dma/imx-dma.h --- drivers/dma/imx-sdma.c | 38 +++++++++++++++++++++++++++++-------- include/linux/dma/imx-dma.h | 1 + 2 files changed, 31 insertions(+), 8 deletions(-) diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 8535018ee7a2..e9b8b2e9f7c9 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -941,7 +941,10 @@ static irqreturn_t sdma_int_handler(int irq, void *dev_id) desc = sdmac->desc; if (desc) { if (sdmac->flags & IMX_DMA_SG_LOOP) { - sdma_update_channel_loop(sdmac); + if (sdmac->peripheral_type != IMX_DMATYPE_HDMI) + sdma_update_channel_loop(sdmac); + else + vchan_cyclic_callback(&desc->vd); } else { mxc_sdma_handle_channel_normal(sdmac); vchan_cookie_complete(&desc->vd); @@ -1061,6 +1064,10 @@ static int sdma_get_pc(struct sdma_channel *sdmac, per_2_emi = sdma->script_addrs->sai_2_mcu_addr; emi_2_per = sdma->script_addrs->mcu_2_sai_addr; break; + case IMX_DMATYPE_HDMI: + emi_2_per = sdma->script_addrs->hdmi_dma_addr; + sdmac->is_ram_script = true; + break; default: dev_err(sdma->dev, "Unsupported transfer type %d\n", peripheral_type); @@ -1112,11 +1119,16 @@ static int sdma_load_context(struct sdma_channel *sdmac) /* Send by context the event mask,base address for peripheral * and watermark level */ - context->gReg[0] = sdmac->event_mask[1]; - context->gReg[1] = sdmac->event_mask[0]; - context->gReg[2] = sdmac->per_addr; - context->gReg[6] = sdmac->shp_addr; - context->gReg[7] = sdmac->watermark_level; + if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) { + context->gReg[4] = sdmac->per_addr; + context->gReg[6] = sdmac->shp_addr; + } else { + context->gReg[0] = sdmac->event_mask[1]; + context->gReg[1] = sdmac->event_mask[0]; + context->gReg[2] = sdmac->per_addr; + context->gReg[6] = sdmac->shp_addr; + context->gReg[7] = sdmac->watermark_level; + } bd0->mode.command = C0_SETDM; bd0->mode.status = BD_DONE | BD_WRAP | BD_EXTD; @@ -1488,7 +1500,7 @@ static struct sdma_desc *sdma_transfer_init(struct sdma_channel *sdmac, desc->sdmac = sdmac; desc->num_bd = bds; - if (sdma_alloc_bd(desc)) + if (bds && sdma_alloc_bd(desc)) goto err_desc_out; /* No slave_config called in MEMCPY case, so do here */ @@ -1653,13 +1665,16 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic( { struct sdma_channel *sdmac = to_sdma_chan(chan); struct sdma_engine *sdma = sdmac->sdma; - int num_periods = buf_len / period_len; + int num_periods = 0; int channel = sdmac->channel; int i = 0, buf = 0; struct sdma_desc *desc; dev_dbg(sdma->dev, "%s channel: %d\n", __func__, channel); + if (sdmac->peripheral_type != IMX_DMATYPE_HDMI) + num_periods = buf_len / period_len; + sdma_config_write(chan, &sdmac->slave_config, direction); desc = sdma_transfer_init(sdmac, direction, num_periods); @@ -1676,6 +1691,9 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic( goto err_bd_out; } + if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) + return vchan_tx_prep(&sdmac->vc, &desc->vd, flags); + while (buf < buf_len) { struct sdma_buffer_descriptor *bd = &desc->bd[i]; int param; @@ -1736,6 +1754,10 @@ static int sdma_config_write(struct dma_chan *chan, sdmac->watermark_level |= (dmaengine_cfg->dst_maxburst << 16) & SDMA_WATERMARK_LEVEL_HWML; sdmac->word_size = dmaengine_cfg->dst_addr_width; + } else if (sdmac->peripheral_type == IMX_DMATYPE_HDMI) { + sdmac->per_address = dmaengine_cfg->dst_addr; + sdmac->per_address2 = dmaengine_cfg->src_addr; + sdmac->watermark_level = 0; } else { sdmac->per_address = dmaengine_cfg->dst_addr; sdmac->watermark_level = dmaengine_cfg->dst_maxburst * diff --git a/include/linux/dma/imx-dma.h b/include/linux/dma/imx-dma.h index 8887762360d4..ef72e00fb55e 100644 --- a/include/linux/dma/imx-dma.h +++ b/include/linux/dma/imx-dma.h @@ -40,6 +40,7 @@ enum sdma_peripheral_type { IMX_DMATYPE_ASRC_SP, /* Shared ASRC */ IMX_DMATYPE_SAI, /* SAI */ IMX_DMATYPE_MULTI_SAI, /* MULTI FIFOs For Audio */ + IMX_DMATYPE_HDMI, /* HDMI Audio */ }; enum imx_dma_prio {