From patchwork Mon Apr 1 20:43:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Rob Herring (Arm)" X-Patchwork-Id: 13613013 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B76321EB31; Mon, 1 Apr 2024 20:44:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712004240; cv=none; b=WyMDEcQJBO5sUhenjIVRbtUEMCJ14ND9eEI5jyHDMUgm+9lb8WebPFLUkKusKYAHPnhiN0gKWNdSgJISVqMyjFP6zFv8f8354/ONOvyzv4Hl3eAcAaWAzFtljpRzN6N9ZjPssluN/GgyoifHt6gVRnzgvZ+Tu8dmAorm/GePgP0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1712004240; c=relaxed/simple; bh=PbWJ4zFdnAhUsADey3LkEStZEZuTOSuvaXwBHAs8Hr4=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=HimMGQIzENzqW54OMLkYyRQ6BrMdhvl4oc9G9SaBLGo2rPagHHcDenRg0vvgDgWeHQo8HoQkPJ07/pUMyuxlonRsNw7v4coItzy6zoOtYvNjiND4TRQhGXXsFLU+DrGXaKuP40LJgGgVsApxMxqJ1fJrDBtSP9kz83pIXMDiKx4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bCSbRpX1; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bCSbRpX1" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2A9DAC433F1; Mon, 1 Apr 2024 20:44:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1712004240; bh=PbWJ4zFdnAhUsADey3LkEStZEZuTOSuvaXwBHAs8Hr4=; h=From:To:Cc:Subject:Date:From; b=bCSbRpX1FdqEtSkCsK5Qq6d5phY2G8Tm8eayj3N23DC/LYiz3AV38rV4+M6GFwapH CTp6RFi/2511ccrU3R44+pACYW47QHouai/AGB+UIuUUe4lzL1d6ZTN7qteihruKzz c5a51RajNe8wz97cSgHxO2aXp1KZ7rh8uc0dmmuaO+cph3xDGkd3IaQr/yy3getaAG SyiJNaxAl7l/sR1kJSXtd0dF8etP8m+poFPAtt/nZV7znsHZ6hnP55ECxZa8h1V7YL Uw7l+zD3Y8Vluiv2ITLC9bJQ8QCKAGiM1cBFSyIipg8G2ZL4joArXpq/IgYSL7xl24 0jFKYlxvHzxeA== From: Rob Herring To: Viresh Kumar , Andy Shevchenko , Vinod Koul , Krzysztof Kozlowski , Conor Dooley Cc: Viresh Kumar , Serge Semin , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] dt-bindings: dma: snps,dma-spear1340: Fix data{-,_}width schema Date: Mon, 1 Apr 2024 15:43:53 -0500 Message-ID: <20240401204354.1691845-1-robh@kernel.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 'data-width' and 'data_width' properties are defined as arrays, but the schema is defined as a matrix. That works currently since everything gets decoded in to matrices, but that is internal to dtschema and could change. Acked-by: Viresh Kumar Reviewed-by: Serge Semin Signed-off-by: Rob Herring Acked-by: Conor Dooley --- v2: - Make 'minItems' explicit. This works around a bug in dtschema, and is also preferred. - Add tags --- .../bindings/dma/snps,dma-spear1340.yaml | 42 +++++++++---------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml index 5da8291a7de0..c21a4f073f6c 100644 --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml @@ -93,10 +93,10 @@ properties: data-width: $ref: /schemas/types.yaml#/definitions/uint32-array description: Data bus width per each DMA master in bytes. + minItems: 1 + maxItems: 4 items: - maxItems: 4 - items: - enum: [4, 8, 16, 32] + enum: [4, 8, 16, 32] data_width: $ref: /schemas/types.yaml#/definitions/uint32-array @@ -106,28 +106,28 @@ properties: deprecated. It' usage is discouraged in favor of data-width one. Moreover the property incorrectly permits to define data-bus width of 8 and 16 bits, which is impossible in accordance with DW DMAC IP-core data book. + minItems: 1 + maxItems: 4 items: - maxItems: 4 - items: - enum: - - 0 # 8 bits - - 1 # 16 bits - - 2 # 32 bits - - 3 # 64 bits - - 4 # 128 bits - - 5 # 256 bits - default: 0 + enum: + - 0 # 8 bits + - 1 # 16 bits + - 2 # 32 bits + - 3 # 64 bits + - 4 # 128 bits + - 5 # 256 bits + default: 0 multi-block: $ref: /schemas/types.yaml#/definitions/uint32-array description: | LLP-based multi-block transfer supported by hardware per each DMA channel. + minItems: 1 + maxItems: 8 items: - maxItems: 8 - items: - enum: [0, 1] - default: 1 + enum: [0, 1] + default: 1 snps,max-burst-len: $ref: /schemas/types.yaml#/definitions/uint32-array @@ -138,11 +138,11 @@ properties: will be from 1 to max-burst-len words. It's an array property with one cell per channel in the units determined by the value set in the CTLx.SRC_TR_WIDTH/CTLx.DST_TR_WIDTH fields (data width). + minItems: 1 + maxItems: 8 items: - maxItems: 8 - items: - enum: [4, 8, 16, 32, 64, 128, 256] - default: 256 + enum: [4, 8, 16, 32, 64, 128, 256] + default: 256 snps,dma-protection-control: $ref: /schemas/types.yaml#/definitions/uint32