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EDMA supports each power-domain for each dma channel. So minItems and maxItems align 'dma-channels'. Change fsl,imx93-edma3 example to fsl,imx8qm-edma to reflect this variants. Fixed below DTB_CHECK warning: dma-controller@599f0000: Unevaluated properties are not allowed ('power-domains' was unexpected) Signed-off-by: Frank Li --- Notes: Change from v3 to v4 - Remove 'contains' change should be belong to first patch when rebase. make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- -j8 dt_binding_check DT_SCHEMA_FILES=fsl,edma.yaml LINT Documentation/devicetree/bindings DTEX Documentation/devicetree/bindings/dma/fsl,edma.example.dts CHKDT Documentation/devicetree/bindings/processed-schema.json SCHEMA Documentation/devicetree/bindings/processed-schema.json DTC_CHK Documentation/devicetree/bindings/dma/fsl,edma.example.dtb After this patch no warning for imx8dxl-evk.dtb. touch arch/arm64/boot/dts/freescale/imx8dxl.dtsi make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- -j8 CHECK_DTBS=y freescale/imx8dxl-evk.dtb DTC_CHK arch/arm64/boot/dts/freescale/imx8dxl-evk.dtb Change from v2 to v3 - set 'power-domains' false for other compatitble string - change imx93 example to 8qm example to affect this change according to Krzysztof Kozlowski's suggestion, choose least channel number edma instance to reduce code copy. max channel number is 64. - Rebase to latest dmaengine/next, fixes conflicts. Change from v1 to v2 - using maxitem: 64. Each channel have one power domain. Max 64 dmachannel. - add power-domains to 'required' when compatible string is fsl,imx8qm-adma or fsl,imx8qm-edma .../devicetree/bindings/dma/fsl,edma.yaml | 77 ++++++++++--------- 1 file changed, 39 insertions(+), 38 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml index fb5fbe4b9f9d4..012522612dc96 100644 --- a/Documentation/devicetree/bindings/dma/fsl,edma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml @@ -71,6 +71,10 @@ properties: minItems: 1 maxItems: 33 + power-domains: + minItems: 1 + maxItems: 64 + big-endian: description: | If present registers and hardware scatter/gather descriptors of the @@ -202,6 +206,20 @@ allOf: required: - clocks + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8qm-adma + - fsl,imx8qm-edma + then: + required: + - power-domains + else: + properties: + power-domains: false + unevaluatedProperties: false examples: @@ -257,44 +275,27 @@ examples: - | #include - #include + #include - dma-controller@44000000 { - compatible = "fsl,imx93-edma3"; - reg = <0x44000000 0x200000>; + dma-controller@5a9f0000 { + compatible = "fsl,imx8qm-edma"; + reg = <0x5a9f0000 0x90000>; #dma-cells = <3>; - dma-channels = <31>; - interrupts = , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - ; - clocks = <&clk IMX93_CLK_EDMA1_GATE>; - clock-names = "dma"; + dma-channels = <8>; + interrupts = , + , + , + , + , + , + , + ; + power-domains = <&pd IMX_SC_R_DMA_3_CH0>, + <&pd IMX_SC_R_DMA_3_CH1>, + <&pd IMX_SC_R_DMA_3_CH2>, + <&pd IMX_SC_R_DMA_3_CH3>, + <&pd IMX_SC_R_DMA_3_CH4>, + <&pd IMX_SC_R_DMA_3_CH5>, + <&pd IMX_SC_R_DMA_3_CH6>, + <&pd IMX_SC_R_DMA_3_CH7>; };