| Message ID | 20240520122351.1691058-2-spujar@nvidia.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Virtualization support for Tegra ADMA | expand |
On 20/05/2024 14:23, Sameer Pujar wrote: > From: Mohan Kumar <mkumard@nvidia.com> > > For Non-Hypervisor mode, Tegra ADMA driver requires the register > resource range to include both global and channel page in the reg > entry. For Hypervisor more, Tegra ADMA driver requires only the > channel page and global page range is not allowed for access. > > Add reg-names DT binding for Hypervisor mode to help driver to > differentiate the config between Hypervisor and Non-Hypervisor > mode of execution. > > Signed-off-by: Mohan Kumar <mkumard@nvidia.com> > Signed-off-by: Sameer Pujar <spujar@nvidia.com> Please use scripts/get_maintainers.pl to get a list of necessary people and lists to CC. It might happen, that command when run on an older kernel, gives you outdated entries. Therefore please be sure you base your patches on recent Linux kernel. Tools like b4 or scripts/get_maintainer.pl provide you proper list of people, so fix your workflow. Tools might also fail if you work on some ancient tree (don't, instead use mainline), work on fork of kernel (don't, instead use mainline) or you ignore some maintainers (really don't). Just use b4 and everything should be fine, although remember about `b4 prep --auto-to-cc` if you added new patches to the patchset. You missed at least devicetree list (maybe more), so this won't be tested by automated tooling. Performing review on untested code might be a waste of time, thus I will skip this patch entirely till you follow the process allowing the patch to be tested. Please kindly resend and include all necessary To/Cc entries. Best regards, Krzysztof
On 21-05-2024 14:54, Krzysztof Kozlowski wrote: > On 20/05/2024 14:23, Sameer Pujar wrote: >> From: Mohan Kumar <mkumard@nvidia.com> >> >> For Non-Hypervisor mode, Tegra ADMA driver requires the register >> resource range to include both global and channel page in the reg >> entry. For Hypervisor more, Tegra ADMA driver requires only the >> channel page and global page range is not allowed for access. >> >> Add reg-names DT binding for Hypervisor mode to help driver to >> differentiate the config between Hypervisor and Non-Hypervisor >> mode of execution. >> >> Signed-off-by: Mohan Kumar <mkumard@nvidia.com> >> Signed-off-by: Sameer Pujar <spujar@nvidia.com> > Please use scripts/get_maintainers.pl to get a list of necessary people > and lists to CC. It might happen, that command when run on an older > kernel, gives you outdated entries. Therefore please be sure you base > your patches on recent Linux kernel. > > Tools like b4 or scripts/get_maintainer.pl provide you proper list of > people, so fix your workflow. Tools might also fail if you work on some > ancient tree (don't, instead use mainline), work on fork of kernel > (don't, instead use mainline) or you ignore some maintainers (really > don't). Just use b4 and everything should be fine, although remember > about `b4 prep --auto-to-cc` if you added new patches to the patchset. > > You missed at least devicetree list (maybe more), so this won't be > tested by automated tooling. Performing review on untested code might be > a waste of time, thus I will skip this patch entirely till you follow > the process allowing the patch to be tested. > > Please kindly resend and include all necessary To/Cc entries. Sorry about this, I will resend the series. Thanks.
diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml index 877147e95ecc..ede47f4a3eec 100644 --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml @@ -29,8 +29,18 @@ properties: - const: nvidia,tegra186-adma reg: + description: | + For hypervisor mode, the address range should include a + ADMA channel page address range, for non-hypervisor mode + it starts with ADMA base address covering Global and Channel + page address range. maxItems: 1 + reg-names: + description: only required for Hypervisor mode. + items: + - const: vm + interrupts: description: | Should contain all of the per-channel DMA interrupts in