@@ -266,6 +266,9 @@ usart2: serial@400e0000 {
reg = <0x400e0000 0x400>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_USART2>;
+ dmas = <&hpdma 11 0x20 0x10012>,
+ <&hpdma 12 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 32>;
status = "disabled";
};
@@ -275,6 +278,9 @@ usart3: serial@400f0000 {
reg = <0x400f0000 0x400>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_USART3>;
+ dmas = <&hpdma 13 0x20 0x10012>,
+ <&hpdma 14 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 33>;
status = "disabled";
};
@@ -284,6 +290,9 @@ uart4: serial@40100000 {
reg = <0x40100000 0x400>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_UART4>;
+ dmas = <&hpdma 15 0x20 0x10012>,
+ <&hpdma 16 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 34>;
status = "disabled";
};
@@ -293,6 +302,9 @@ uart5: serial@40110000 {
reg = <0x40110000 0x400>;
interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_UART5>;
+ dmas = <&hpdma 17 0x20 0x10012>,
+ <&hpdma 18 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 35>;
status = "disabled";
};
@@ -393,6 +405,9 @@ usart6: serial@40220000 {
reg = <0x40220000 0x400>;
interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_USART6>;
+ dmas = <&hpdma 19 0x20 0x10012>,
+ <&hpdma 20 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 36>;
status = "disabled";
};
@@ -438,6 +453,9 @@ uart9: serial@402c0000 {
reg = <0x402c0000 0x400>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_UART9>;
+ dmas = <&hpdma 25 0x20 0x10012>,
+ <&hpdma 26 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 39>;
status = "disabled";
};
@@ -447,6 +465,9 @@ usart1: serial@40330000 {
reg = <0x40330000 0x400>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_USART1>;
+ dmas = <&hpdma 9 0x20 0x10012>,
+ <&hpdma 10 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 31>;
status = "disabled";
};
@@ -480,6 +501,9 @@ uart7: serial@40370000 {
reg = <0x40370000 0x400>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_UART7>;
+ dmas = <&hpdma 21 0x20 0x10012>,
+ <&hpdma 22 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 37>;
status = "disabled";
};
@@ -489,6 +513,9 @@ uart8: serial@40380000 {
reg = <0x40380000 0x400>;
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CK_KER_UART8>;
+ dmas = <&hpdma 23 0x20 0x10012>,
+ <&hpdma 24 0x20 0x3021>;
+ dma-names = "rx", "tx";
access-controllers = <&rifsc 38>;
status = "disabled";
};
@@ -157,6 +157,8 @@ &usart2 {
pinctrl-0 = <&usart2_pins_a>;
pinctrl-1 = <&usart2_idle_pins_a>;
pinctrl-2 = <&usart2_sleep_pins_a>;
+ /delete-property/dmas;
+ /delete-property/dma-names;
status = "okay";
};
Add dmas and dma-names properties in u(s)art nodes of stm32mp251.dtsi to enable DMA support. RX channel requires to prevent pack/unpack feature of DMA to avoid losing bytes when interrupting RX transfer, as it uses a cyclic buffer. Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> --- arch/arm64/boot/dts/st/stm32mp251.dtsi | 27 +++++++++++++++++++++++++++ arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 2 ++ 2 files changed, 29 insertions(+)