Message ID | 54F18CE9.6090909@marvell.com (mailing list archive) |
---|---|
State | Rejected |
Headers | show |
On Sat, Feb 28, 2015 at 05:39:53PM +0800, Qiao Zhou wrote: > On 02/23/2015 07:23 PM, Vinod Koul wrote: > >On Thu, Feb 05, 2015 at 08:54:19PM +0800, Qiao Zhou wrote: > >>Below are the refinements. > >>1. Set DMA abort bit when disabling dma channel. This will clear > >>the remaining data in dma FIFO, to fix channel-swap issue. > >>2. Read DMA HW pointer when updating DMA status. Previously dma > >>position is calculated by adding one period size in dma interrupt. > >>This is inaccurate/insufficient for some high-quality audio APP. > >>Since interrupt bottom half handler has variable schedule delay, > >>it causes big error when calculating sample delay. Read the actual > >>HW pointer and feedback can improve the accuracy. > >>3. Do some minor code clean. > >This fails to apply for me, care to rebase pls > > > Rebased. Thanks. And that is why people use git-send email and don't copy patches. Pls resend again, as your MUA has wrapped this so cant apply
On 03/03/2015 12:56 AM, Vinod Koul wrote: > And that is why people use git-send email and don't copy patches. Pls resend > again, as your MUA has wrapped this so cant apply Thanks for correcting and I'll pay attention to it in future. The patch is re-sent via git-send email.
diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c index 70c2fa9..b6f4e1f 100644 --- a/drivers/dma/mmp_tdma.c +++ b/drivers/dma/mmp_tdma.c @@ -110,7 +110,7 @@ struct mmp_tdma_chan { struct tasklet_struct tasklet; struct mmp_tdma_desc *desc_arr; - phys_addr_t desc_arr_phys; + dma_addr_t desc_arr_phys; int desc_num; enum dma_transfer_direction dir; dma_addr_t dev_addr; @@ -166,9 +166,12 @@ static void mmp_tdma_enable_chan(struct mmp_tdma_chan *tdmac) static int mmp_tdma_disable_chan(struct dma_chan *chan) { struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan); + u32 tdcr; - writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN, - tdmac->reg_base + TDCR); + tdcr = readl(tdmac->reg_base + TDCR); + tdcr |= TDCR_ABR; + tdcr &= ~TDCR_CHANEN; + writel(tdcr, tdmac->reg_base + TDCR); tdmac->status = DMA_COMPLETE;