From patchwork Tue Dec 15 17:30:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Pimentel X-Patchwork-Id: 11975405 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82A7FC4361B for ; Tue, 15 Dec 2020 17:41:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4860D22ADC for ; Tue, 15 Dec 2020 17:41:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730558AbgLORkB (ORCPT ); Tue, 15 Dec 2020 12:40:01 -0500 Received: from smtprelay-out1.synopsys.com ([149.117.87.133]:46040 "EHLO smtprelay-out1.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731151AbgLORbn (ORCPT ); Tue, 15 Dec 2020 12:31:43 -0500 Received: from mailhost.synopsys.com (mdc-mailhost1.synopsys.com [10.225.0.209]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by smtprelay-out1.synopsys.com (Postfix) with ESMTPS id 91FA6C04D2; Tue, 15 Dec 2020 17:30:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=synopsys.com; s=mail; t=1608053442; bh=VirXQZecPAlV36Ny+MWMBcT1Z6kF45ir/tilZlvCLqQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:In-Reply-To: References:From; b=lv5tBCI4fw0wYof+4i8E3ffjsZENiDEY+0qDTYV0aIjkkt0mH20HtlVDwusvoKRbp Bp1hPP4GUVVNxnUUo7vQQtZ6Gjdb6er0VpiEQSyV3KseSjBNiO+4lBsYw70IqO8kEs ng6u8gfPdpUnBbN4q1ri9Aw/mMAPjKH0Vy5VuUvhhmRNVD7CA5M3HBlPc2/ANU/+mr XcNiqZBJoRE3XlfvZRQvdRf4nFIPaU0RuTIAqSTkn9w0DlaMsoYsa8bTP7w7rfC2DE 25Jhk1dpUmecOg3CgpHWDMH5ZaK91joAocefQKxpEJFlCm7NhMrpxCf2iCPk+C8EvS o7nhHNJkEQPGA== Received: from de02dwia024.internal.synopsys.com (de02dwia024.internal.synopsys.com [10.225.19.81]) by mailhost.synopsys.com (Postfix) with ESMTP id 26D1AA024D; Tue, 15 Dec 2020 17:30:41 +0000 (UTC) X-SNPS-Relay: synopsys.com From: Gustavo Pimentel To: Gustavo Pimentel , Dan Williams , Vinod Koul Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/15] dmaengine: dw-edma: Reorder variables to keep consistency Date: Tue, 15 Dec 2020 18:30:17 +0100 Message-Id: <7126adcc8ffaa0a81caea7354a5eec4f6cd84e7c.1608053262.git.gustavo.pimentel@synopsys.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org In the driver code structure, I tried to keep the code style consistency by writing the write channels instructions first, and then follow by the read channels instructions, mimicking the hardware implementation. However, this code style failed in some cases. This patch fixes that and no functional changes are expected. Signed-off-by: Gustavo Pimentel --- drivers/dma/dw-edma/dw-edma-pcie.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c index 2bd31b0..ebb2605 100644 --- a/drivers/dma/dw-edma/dw-edma-pcie.c +++ b/drivers/dma/dw-edma/dw-edma-pcie.c @@ -20,8 +20,8 @@ #define DW_PCIE_VSEC_DMA_ID 0x6 #define DW_PCIE_VSEC_DMA_BAR GENMASK(10, 8) #define DW_PCIE_VSEC_DMA_MAP GENMASK(2, 0) -#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16) #define DW_PCIE_VSEC_DMA_WR_CH GENMASK(9, 0) +#define DW_PCIE_VSEC_DMA_RD_CH GENMASK(25, 16) struct dw_edma_pcie_data { /* eDMA registers location */ @@ -39,8 +39,8 @@ struct dw_edma_pcie_data { /* Other */ enum dw_edma_map_format mf; u8 irqs; - u16 rd_ch_cnt; u16 wr_ch_cnt; + u16 rd_ch_cnt; }; static const struct dw_edma_pcie_data snps_edda_data = { @@ -59,8 +59,8 @@ static const struct dw_edma_pcie_data snps_edda_data = { /* Other */ .mf = EDMA_MF_EDMA_UNROLL, .irqs = 1, - .rd_ch_cnt = 0, .wr_ch_cnt = 0, + .rd_ch_cnt = 0, }; static int dw_edma_pcie_irq_vector(struct device *dev, unsigned int nr) @@ -99,8 +99,8 @@ static void dw_edma_pcie_get_vsec_dma_data(struct pci_dev *pdev, pdata->rg_bar = FIELD_GET(DW_PCIE_VSEC_DMA_BAR, val); pci_read_config_dword(pdev, vsec + 0xc, &val); - pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val); pdata->wr_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_WR_CH, val); + pdata->rd_ch_cnt = FIELD_GET(DW_PCIE_VSEC_DMA_RD_CH, val); pci_read_config_dword(pdev, vsec + 0x14, &val); off = val; @@ -216,8 +216,8 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev, dw->mf = vsec_data.mf; dw->nr_irqs = nr_irqs; dw->ops = &dw_edma_pcie_core_ops; - dw->rd_ch_cnt = vsec_data.rd_ch_cnt; dw->wr_ch_cnt = vsec_data.wr_ch_cnt; + dw->rd_ch_cnt = vsec_data.rd_ch_cnt; /* Debug info */ if (dw->mf == EDMA_MF_EDMA_LEGACY)