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Fri, 12 Apr 2024 07:07:23 +0000 Received: from IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::182f:841b:6e76:b819]) by IA1PR20MB4953.namprd20.prod.outlook.com ([fe80::182f:841b:6e76:b819%2]) with mapi id 15.20.7409.042; Fri, 12 Apr 2024 07:07:23 +0000 From: Inochi Amaoto To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Jisheng Zhang , Liu Gui , Jingbao Qiu , dlan@gentoo.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v8 2/3] soc/sophgo: add top sysctrl layout file for CV18XX/SG200X Date: Fri, 12 Apr 2024 15:07:32 +0800 Message-ID: X-Mailer: git-send-email 2.44.0 In-Reply-To: References: X-TMN: [cEy7nyF9q4T5AI1+J2yR/KTY4rlD8pS7CsqHK/an6GU=] X-ClientProxiedBy: SG2P153CA0026.APCP153.PROD.OUTLOOK.COM (2603:1096:4:c7::13) To IA1PR20MB4953.namprd20.prod.outlook.com (2603:10b6:208:3af::19) X-Microsoft-Original-Message-ID: <20240412070734.62133-2-inochiama@outlook.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR20MB4953:EE_|SA1PR20MB7440:EE_ X-MS-Office365-Filtering-Correlation-Id: cdcf65bf-e0e5-42a5-e4a1-08dc5abf3377 X-Microsoft-Antispam: BCL:0; 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Add soc header file to describe it. Signed-off-by: Inochi Amaoto --- include/soc/sophgo/cv1800-sysctl.h | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 include/soc/sophgo/cv1800-sysctl.h -- 2.44.0 diff --git a/include/soc/sophgo/cv1800-sysctl.h b/include/soc/sophgo/cv1800-sysctl.h new file mode 100644 index 000000000000..b9396d33e240 --- /dev/null +++ b/include/soc/sophgo/cv1800-sysctl.h @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2023 Inochi Amaoto + */ + +#ifndef CV1800_SYSCTL_H +#define CV1800_SYSCTL_H + +/* + * SOPHGO CV1800/SG2000 SoC top system controller registers offsets. + */ + +#define CV1800_CONF_INFO 0x004 +#define CV1800_SYS_CTRL_REG 0x008 +#define CV1800_USB_PHY_CTRL_REG 0x048 +#define CV1800_SDMA_DMA_CHANNEL_REMAP0 0x154 +#define CV1800_SDMA_DMA_CHANNEL_REMAP1 0x158 +#define CV1800_TOP_TIMER_CLK_SEL 0x1a0 +#define CV1800_TOP_WDT_CTRL 0x1a8 +#define CV1800_DDR_AXI_URGENT_OW 0x1b8 +#define CV1800_DDR_AXI_URGENT 0x1bc +#define CV1800_DDR_AXI_QOS_0 0x1d8 +#define CV1800_DDR_AXI_QOS_1 0x1dc +#define CV1800_SD_PWRSW_CTRL 0x1f4 +#define CV1800_SD_PWRSW_TIME 0x1f8 +#define CV1800_DDR_AXI_QOS_OW 0x23c +#define CV1800_SD_CTRL_OPT 0x294 +#define CV1800_SDMA_DMA_INT_MUX 0x298 + +#endif // CV1800_SYSCTL_H