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Fri, 17 Mar 2023 09:15:12 -0500 Received: from xhdshubhraj40.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2375.34 via Frontend Transport; Fri, 17 Mar 2023 09:15:10 -0500 From: Shubhrajyoti Datta To: CC: , , , , , , , , Subject: [PATCH v5 0/2] edac: xilinx: Added EDAC support for Xilinx DDR controller Date: Fri, 17 Mar 2023 19:45:07 +0530 Message-ID: <20230317141509.17534-1-shubhrajyoti.datta@amd.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000C979:EE_|MW6PR12MB7069:EE_ X-MS-Office365-Filtering-Correlation-Id: ae124814-f87f-4589-2626-08db26f207af X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: mhRs+NFoLLxyAklSMSUP10skbUPHvoi4wPDdaGWe6zC3zT8pEckWk7tOZb5j+uIhvvs2zhkwGwpe6fYd0mOxzs+gWM+lFbCqJ1zaTFCl8IDM7JypBJMaM/RLip2U6qZyrIoujE9L/4y48O2w2p8Z4/JBRz9BZBvHOfsKQfzlDv+nT3SSB0u4tpN4Rtjl//aTa2ve0l80i17sHY8MbyexPXMYgdXxjO+nHhCntqtA7aVUVLaIaveRl8GE3AvG74Du7dmHE7/sTv5rbzpKw7XWuxJJY2J2ov10JVsUfCi+Gx3IFKwzFJ5NMCOjFFjhUJMCgMKKfW+/U5BeHTfpuX2CcydXg8nRFvNuK6rOuMZQ1oQcQ/8bI3EVxdZ23Ywaym6AU7Dzi37PhCxRhCVXUr4WuniyeUcXESN6+LFPa3yquodaT+hbw4A90iCN5ovkziBUVoaDKYseM67TT3dSW82/oH4fU+N00YZIXVUtHKxtYDYr0aqPqrLbD8DN+h9chGP3W8/rvi/2DVR56/h5pIFo1k2bm+/SYQgyo0Lfi9KrG1WTVxFck8LK9e1MVa4BVtGpWLJS8W5qPdmykx0JZZH+yAXmiamxQC3HrRXYG7cSVpDw/CflxWIG3kga+5BX/lpndUK7VF9IYFe3XPwYJwlotJqEYwNrhABY1i+YNyS22ebbzXZwvNbbMTdELBrJkfDTtQcpXX45gdAhplvb4c4VgATqFgbwArEpAGJA1lcQQ+Q= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230025)(4636009)(376002)(136003)(396003)(39860400002)(346002)(451199018)(36840700001)(40470700004)(46966006)(41300700001)(8936002)(36860700001)(8676002)(70586007)(70206006)(4326008)(6916009)(40480700001)(356005)(36756003)(86362001)(82310400005)(81166007)(40460700003)(44832011)(5660300002)(82740400003)(2906002)(83380400001)(6666004)(2616005)(186003)(426003)(336012)(47076005)(26005)(1076003)(316002)(54906003)(478600001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Mar 2023 14:15:15.4667 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ae124814-f87f-4589-2626-08db26f207af X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000C979.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB7069 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org The integrated DDR Memory Controllers (DDRMCs) support both DDR4 and LPDDR4/4X memory interfaces. It has four programmable NoC interface ports and is designed to handle multiple streams of traffic. Optional external interface reliability include ECC error detection/correction and command address parity. Adding edac support for DDR Memory controller. Changes in v5: Update subject Changes in v4: Update the subject rename the driver file. fix the debugfs file. fix unneeded capitalisation. refactor code Changes in v3: Rebased and resent. Changes in v2: remove edac from compatible Update the description update the ddrmc_base and ddrmc_noc_base names Update a missed out file remove edac from compatible name rename ddrmc_noc_base and ddrmc_base Shubhrajyoti Datta (2): dt-bindings: edac: Add bindings for Xilinx Versal EDAC for DDRMC EDAC/versal: Add a Xilinx Versal memory controller driver .../xlnx,versal-ddrmc-edac.yaml | 57 + MAINTAINERS | 7 + drivers/edac/Kconfig | 11 + drivers/edac/Makefile | 1 + drivers/edac/versal_edac.c | 1076 +++++++++++++++++ include/linux/firmware/xlnx-zynqmp.h | 10 + 6 files changed, 1162 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/xlnx,versal-ddrmc-edac.yaml create mode 100644 drivers/edac/versal_edac.c