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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CH3PEPF0000000A.mail.protection.outlook.com (10.167.244.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7633.15 via Frontend Transport; Thu, 6 Jun 2024 20:33:32 +0000 Received: from jallen-jump-host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 6 Jun 2024 15:33:31 -0500 From: John Allen To: , , , CC: , , , John Allen Subject: [PATCH v5 0/6] RAS: ATL: DF 4.5 NP2 Denormalization Date: Thu, 6 Jun 2024 20:33:07 +0000 Message-ID: <20240606203313.51197-1-john.allen@amd.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-edac@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF0000000A:EE_|IA1PR12MB8239:EE_ X-MS-Office365-Filtering-Correlation-Id: 392a10c9-9879-4f74-06e6-08dc8667eeb5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|36860700004|1800799015|82310400017|376005; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jun 2024 20:33:32.3424 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 392a10c9-9879-4f74-06e6-08dc8667eeb5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8239 Implement non-power-of-two denormalization for Data Fabric 4.5 in the AMD address translation library. Tree: git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git Base commit: dadc295cbd03955cc1ba55af55e23a06713d1a5f (origin/edac-amd-atl) v2: - Fix compilation error. - Make remove_base_and_hole the inverse of add_base_and_hole. - Move all map validation checks to validate_address_map at the beginning of translation v3: - Fix bug where the legacy hole was not getting removed properly. - Minor rework of functions for matching the normalized address and logical cs fabric id. v4: - Merge common cases in map validation function. - Fix map validation for cases that don't have explicit checks. v5: - Add patches to add a pr_fmt prefix for the driver and share the internal.h header with the FMPM driver. - Don't fail to load driver if DRAM hole base can't be read. John Allen (6): RAS/AMD/ATL: Add amd_atl pr_fmt prefix RAS/AMD/ATL: Read DRAM hole base early RAS/AMD/ATL: Expand helpers for adding and removing base and hole RAS/AMD/ATL: Validate address map when information is gathered RAS/AMD/ATL: Implement DF 4.5 NP2 denormalization RAS/AMD/FMPM: Use atl internal.h for INVALID_SPA drivers/ras/amd/atl/core.c | 50 +-- drivers/ras/amd/atl/dehash.c | 43 --- drivers/ras/amd/atl/denormalize.c | 561 ++++++++++++++++++++++++++++++ drivers/ras/amd/atl/internal.h | 48 +++ drivers/ras/amd/atl/map.c | 97 ++++++ drivers/ras/amd/atl/system.c | 21 +- drivers/ras/amd/fmpm.c | 4 +- 7 files changed, 755 insertions(+), 69 deletions(-)