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Mon, 9 Nov 2020 21:06:35 +0000 From: Yazen Ghannam To: x86@kernel.org Cc: Yazen Ghannam , linux-kernel@vger.kernel.org, Smita.KoralahalliChannabasappa@amd.com, linux-edac@vger.kernel.org, puwen@hygon.cn, kim.phillips@amd.com, thomas.lendacky@amd.com, wei.huang2@amd.com Subject: [PATCH 3/4] EDAC/mce_amd: Use struct cpuinfo_x86.cpu_die_id for AMD NodeId Date: Mon, 9 Nov 2020 21:06:58 +0000 Message-Id: <20201109210659.754018-4-Yazen.Ghannam@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201109210659.754018-1-Yazen.Ghannam@amd.com> References: <20201109210659.754018-1-Yazen.Ghannam@amd.com> X-Originating-IP: [165.204.78.2] X-ClientProxiedBy: DM5PR12CA0064.namprd12.prod.outlook.com (2603:10b6:3:103::26) To BN8PR12MB3108.namprd12.prod.outlook.com (2603:10b6:408:40::20) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from yaz-ethanolx.amd.com (165.204.78.2) by DM5PR12CA0064.namprd12.prod.outlook.com (2603:10b6:3:103::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3541.21 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: R7Kya3WLgkrZh7TK+Pi27Vmy0ZQEpcVmJdj2NnQtYCofa1gwRiIU5HBfSg2d1m6P8vjoVgx0yAGbTViH9iaqusxFspfkOn59+0rWOmN78Be22V83iyH4ngMMg8E5Of+H3CjPCC/movHJTymNaKy5BN/eKULWZLod+fWAx2dd3zZjb72xa0xrfSelwYTtZz2MTjJdUieqM/fIuv4rbGwMQjIi+j91Bng5TQOx/gl2aOYW5cpZmyCSKVHjCluokc1iAir1dMvKxR79P5RO9cLr1wPd+Dq0s/l2eNZ2ro4tv282GDp3cSZNU3LeoV3UAEjmizFH9b6FFrhzJzp5W1CcBRW/j4t6HnbDwUFwj3cuSxfSokGvZUn358NAFprW46ZBX2PgdoCYmtuMch/CBIfYrP5HYoPE7HrMcg4GXTh5F/19rwH899xYymXsWrVIGFTtxcOM2KSQVXHHfUFrFjiz5Mx03LB+GlVYK/Y6hZxOKt8+jvkE3wAS0Gt9mbH8S8YDnht8GExFaSBO/3zNszscHnP5Hm3tt55dBRgypz3U3LoTSaSbUFf/mwTcozdcqw7PoKuyAIzzYrqvgKSc0p++uD2OK2vd1q9FM7DnBbf4/RZ+t2JE6BzfssOKLiO9h2At4ByHd/2Ldg+0RrDGN/yjoA== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: a937df0b-6b50-4485-4993-08d884f35787 X-MS-Exchange-CrossTenant-AuthSource: BN8PR12MB3108.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2020 21:06:35.6786 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: AIC8H4vXFGlxq3v3stK3M5McGGKhqIgFCLoK16Y/bb8tKJeOGEkrdCITdINF3tNVX2KfTDHFVvVc5amVnHXCyQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR12MB2979 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Yazen Ghannam The edac_mce_amd module calls decode_dram_ecc() on AMD Family17h and later systems. This function is used in amd64_edac_mod to do system-specific decoding for DRAM ECC errors. The function takes a "NodeId" as a parameter. In AMD documentation, NodeId is used to identify a physical die in a system. This can be used to identify a node in the AMD_NB code and also it is used with umc_normaddr_to_sysaddr(). However, the input used for decode_dram_ecc() is currently the NUMA node of a logical CPU. In the default configuration, the NUMA node and physical die will be equivalent, so this doesn't have an impact. But the NUMA node configuration can be adjusted with optional memory interleaving modes. This will cause the NUMA node enumeration to not match the physical die enumeration. The mismatch will cause the address translation function to fail or report incorrect results. Use struct cpuinfo_x86.cpu_die_id for the node_id parameter to ensure the physical ID is used. Fixes: fbe63acf62f5 ("EDAC, mce_amd: Use cpu_to_node() to find the node ID") Signed-off-by: Yazen Ghannam --- drivers/edac/mce_amd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c index 85095e3902ec..5dd905a3f30c 100644 --- a/drivers/edac/mce_amd.c +++ b/drivers/edac/mce_amd.c @@ -1003,7 +1003,7 @@ static void decode_smca_error(struct mce *m) pr_cont(", %s.\n", smca_mce_descs[bank_type].descs[xec]); if (bank_type == SMCA_UMC && xec == 0 && decode_dram_ecc) - decode_dram_ecc(cpu_to_node(m->extcpu), m); + decode_dram_ecc(topology_die_id(m->extcpu), m); } static inline void amd_decode_err_code(u16 ec)