@@ -938,14 +938,34 @@ static int denormalize_addr(struct addr_ctx *ctx)
return 0;
}
-int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
+static int add_base_and_hole(struct addr_ctx *ctx)
{
- u64 dram_base_addr, dram_limit_addr, dram_hole_base;
+ u64 dram_base_addr = (ctx->reg_base_addr & GENMASK_ULL(31, 12)) << 16;
- u32 tmp;
+ /* Add dram base address */
+ ctx->ret_addr += dram_base_addr;
+
+ /* If legacy MMIO hole enabled */
+ if (ctx->reg_base_addr & BIT(1)) {
+ u32 dram_hole_base;
+
+ if (amd_df_indirect_read(ctx->nid, df_regs[DRAM_HOLE_CTL],
+ ctx->umc, &dram_hole_base))
+ return -EINVAL;
+
+ dram_hole_base &= GENMASK(31, 24);
+ if (ctx->ret_addr >= dram_hole_base)
+ ctx->ret_addr += (BIT_ULL(32) - dram_hole_base);
+ }
+
+ return 0;
+}
+
+int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
+{
+ u64 dram_limit_addr;
u8 hashed_bit;
- u8 lgcy_mmio_hole_en;
struct addr_ctx ctx;
@@ -971,23 +991,10 @@ int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
if (denormalize_addr(&ctx))
goto out_err;
- lgcy_mmio_hole_en = ctx.reg_base_addr & BIT(1);
- dram_base_addr = (ctx.reg_base_addr & GENMASK_ULL(31, 12)) << 16;
-
dram_limit_addr = ((ctx.reg_limit_addr & GENMASK_ULL(31, 12)) << 16) | GENMASK_ULL(27, 0);
- /* Add dram base address */
- ctx.ret_addr += dram_base_addr;
-
- /* If legacy MMIO hole enabled */
- if (lgcy_mmio_hole_en) {
- if (amd_df_indirect_read(nid, df_regs[DRAM_HOLE_CTL], umc, &tmp))
- goto out_err;
-
- dram_hole_base = tmp & GENMASK(31, 24);
- if (ctx.ret_addr >= dram_hole_base)
- ctx.ret_addr += (BIT_ULL(32) - dram_hole_base);
- }
+ if (add_base_and_hole(&ctx))
+ goto out_err;
if (ctx.hash_enabled) {
/* Save some parentheses and grab ls-bit at the end. */