Message ID | 20210623192002.3671647-14-yazen.ghannam@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Wed, 23 Jun 2021 19:20:49 +0000 From: Yazen Ghannam <yazen.ghannam@amd.com> To: linux-edac@vger.kernel.org Cc: linux-kernel@vger.kernel.org, bp@alien8.de, mchehab@kernel.org, tony.luck@intel.com, Smita.KoralahalliChannabasappa@amd.com, Yazen Ghannam <yazen.ghannam@amd.com> Subject: [PATCH v2 13/31] EDAC/amd64: Define function to check DRAM limit address Date: Wed, 23 Jun 2021 19:19:44 +0000 Message-Id: <20210623192002.3671647-14-yazen.ghannam@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210623192002.3671647-1-yazen.ghannam@amd.com> References: <20210623192002.3671647-1-yazen.ghannam@amd.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [165.204.184.1] X-ClientProxiedBy: BLAPR03CA0107.namprd03.prod.outlook.com (2603:10b6:208:32a::22) To BN8PR12MB3108.namprd12.prod.outlook.com (2603:10b6:408:40::20) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from yaz-ethanolx.amd.com (165.204.184.1) by BLAPR03CA0107.namprd03.prod.outlook.com (2603:10b6:208:32a::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4242.19 via Frontend Transport; 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Series |
AMD MCA Address Translation Updates
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expand
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diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 46b0279a2e12..de80a224ef12 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1359,10 +1359,20 @@ static int add_base_and_hole(struct addr_ctx *ctx) return 0; } -static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) +static int addr_over_limit(struct addr_ctx *ctx) { - u64 dram_limit_addr; + u64 dram_limit_addr = ((ctx->reg_limit_addr & GENMASK_ULL(31, 12)) << 16) + | GENMASK_ULL(27, 0); + + /* Is calculated system address above DRAM limit address? */ + if (ctx->ret_addr > dram_limit_addr) + return -EINVAL; + return 0; +} + +static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) +{ struct addr_ctx ctx; memset(&ctx, 0, sizeof(ctx)); @@ -1388,16 +1398,13 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr if (denormalize_addr(&ctx)) goto out_err; - dram_limit_addr = ((ctx.reg_limit_addr & GENMASK_ULL(31, 12)) << 16) | GENMASK_ULL(27, 0); - if (add_base_and_hole(&ctx)) goto out_err; if (ctx.dehash_addr && ctx.dehash_addr(&ctx)) goto out_err; - /* Is calculated system address is above DRAM limit address? */ - if (ctx.ret_addr > dram_limit_addr) + if (addr_over_limit(&ctx)) goto out_err; *sys_addr = ctx.ret_addr;
Move the DRAM limit check into a separate helper function. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> --- Link: https://lkml.kernel.org/r/20210507190140.18854-10-Yazen.Ghannam@amd.com v1->v2: * Moved from arch/x86 to EDAC. drivers/edac/amd64_edac.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-)