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Peter Anvin" , Yazen Ghannam , Muralidhara M K , Akshay Gupta , Youquan Song , Zhen Lei , Smita Koralahalli Subject: [PATCH 1/2] x86/mce: Define function to extract ErrorAddr from MCA_ADDR Date: Thu, 24 Jun 2021 20:33:40 -0500 Message-Id: <20210625013341.231442-1-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 X-Originating-IP: [165.204.184.1] X-ClientProxiedBy: BLAPR03CA0138.namprd03.prod.outlook.com (2603:10b6:208:32e::23) To SN6PR12MB2685.namprd12.prod.outlook.com (2603:10b6:805:67::33) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from ethanolx50f7host.amd.com (165.204.184.1) by BLAPR03CA0138.namprd03.prod.outlook.com (2603:10b6:208:32e::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4264.18 via Frontend Transport; Fri, 25 Jun 2021 01:34:07 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3b8f7ad1-259e-4e27-0173-08d9377953cb X-MS-TrafficTypeDiagnostic: SA0PR12MB4525: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4502; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 7L0fimJqSzIzNQKo4LhN0Vye8Q3L4gHknUssJUTLrjhwDwEBoKAVfs0D7au2VcKZy0wLnrAkc02HFeEfTyO+2+oxO6UqUS0YHZ/AYhAg+CoNOeVBbjQyXw5mnjtczEy4vV3tRIQ46+fPUUvOR69MWS5LGGvYpInvUwFI++DdVbw8J5vhajKYd9kEnJlM4LDy6sX8+aj3XBcxHFwmWwTGpb5cisoV4XCmY6M8QLzMqYHnoLY51dHYan++/zokOwL6KZSiwEGljeCJcX2NtWnYrGMjUG/mf1QorWtxQyOhr2qT1tNc0SKSucX76oprxnbLiOEawGtLEjhZRPbxIkKIKhxQe5MEdTeRAJ3szTtWhWPEh2TSFmRPQdl+m2nXdpBntJ5/Xu9Eir0tfgllnO14jDK+5JDn88H5cEPtlXpMS7u15gNI3EzeOueqry5S5yhmfXLeNCCLcfJBJRxxStdq+nBHAtZqHwThNkS7RyVifz7V30G/0qcZb0+ubsOf+YLtFNsrudRkEbQnGhvQ9Or8nFY+8EVy2a38wQpcWYHPJt+FLJv9FcGRsc6LkhPhl/oyPr60yrmSnDqYe+QahLDy2w3IiTRm0LS0EQxmsQpdISaaCAYRPfkbbIj8qrqum3/K+R61HVKogM7KKB6o8x9WDQ== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SN6PR12MB2685.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFS:(4636009)(39860400002)(376002)(396003)(346002)(136003)(366004)(478600001)(2616005)(956004)(8676002)(86362001)(8936002)(4326008)(38350700002)(38100700002)(36756003)(2906002)(52116002)(66556008)(66476007)(66946007)(7696005)(83380400001)(5660300002)(6666004)(1076003)(26005)(54906003)(6486002)(316002)(16526019)(186003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 2/gRi5Hmb1560ajglTt62VtOJvntFgb6q6fYhElJ0HJ/mbwUd8t/cROTdbq4QtVTO+MDV7nMUOCIG6dKfWWw/76HBgwnCm9N8+rTORpwD9AznU/Y/6EKR5mBK+hMdVudIrKvZPbz/t6O7Tm3ZRpZFCCw0DEuzy298yXVvzFmlgS7L7RCK9oXaGjlPetsdbPERggutXp5Jr7Q6ARdOAr6Wp4p0jRgNRPponcFV8p+A3g94UgMUY1KZl1ckfk5ffUR4s/y0l8lmaPAlAZP5UV28fuWG9Cw3jakax0Xpvhji4gesIF0qsYhji7FkAHtcaNQ9yQ2po3SL7a68fT+dxcninLEnT8tlAGNIUGmLloTTUUtrvVLS1BVoI8th2VhhjKV/qgbDBpAeHXxri+rO3zhv4WM4QvRtm68sxHOSB2224R0hs9B/64cvWW2xN5dSOed/882GbBz+fEtk0ltDdqs27aFciRspsaKdx8d25A2IXt5rQTK8vkkcLkCXdNLYmlNVIGxXykbFA5alaOB6QC6Lr4aPUJOfM4L4h5vkSNfe1ei154kq4tLy/rIS73QO/z5pRUI6Sg/cIQeRuPQHk3VZiP3CMp5wzj2RhMqtTuZUZq27xy5pjSe0sHD/7c3hFBp1/46DjE7NGCXO2giBsUtKEGIMdkP9NTjYa7ZVpn/HzV3WhflviK3jspDIhnF6T6V5kUV+KNZt2rKtekhGamcG6QH/Fqi6QpQbp5OklZQVq+n1SQzXPU4SSqJkjdcBD9DpYYa0x2to5MqHdlxqNRpOvwK0OOXH1hjuUs7Ba2v2c4bTIcAqCoDGiqim14/XVl1Jo3yGXo60SIgDpIVIpSljIuUhlpAuLGpJfwW6mk4AumUatxfOhQ6wUnAVxv7LO88IJHKw6HIsHev99lx2o/X+EnTEXPrDleP0QZM9veVNermrwCFEN5GFt7a3IIf494eFBi6fFWrjfF2FSSzOUEQJMmOzGUWdN/ABpPWbYdP9dNCTc3VaPRdoSNS9wm4moB0d6NBmELUGeTzsaPzlNuDpHo4fr1Hwj7SWLA+FI/6aHjXTYw/gFk4LPNHQDB9wC5SYcwxzVEzAUE3RsaE23+DGbsy5XoUaC73fNEu8/hAEuqvxyAf+5h5eiQvuoimOR3IrMAfhLgoNZsU1FzLX4NWgWfk+xO1OhHufI4lAPc8j3fF1js2WQXddnvTQFbOrJdoNwxxbHDxTisCcZKvg8/JFu/NfevrGWBLLPRXzXzUgVaHoDBxi/eCZIh48TaiVlJ66vSxqn/Nbhmc7hxUDOS89Ts5xHbNObkbOtR7gX47Ia5q30l5tvhlV3OQRa0Nxv/O X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3b8f7ad1-259e-4e27-0173-08d9377953cb X-MS-Exchange-CrossTenant-AuthSource: SN6PR12MB2685.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jun 2021 01:34:08.9133 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 07PcyVsT5j8YH7ZhCSvRfKISYPqPtssFvVibziisjWbET3cydtFbOrgzpBUAkUdPPLqVUiJPV/Y/+CirVAr5uw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4525 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Move MCA_ADDR[ErrorAddr] extraction into a separate helper function. This will be further refactored in the next patch. Signed-off-by: Smita Koralahalli Reviewed-by: Yazen Ghannam --- v2: - No change. --- arch/x86/include/asm/mce.h | 2 ++ arch/x86/kernel/cpu/mce/amd.c | 14 +++++++++----- arch/x86/kernel/cpu/mce/core.c | 7 ++----- 3 files changed, 13 insertions(+), 10 deletions(-) diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 0607ec4f5091..0a1c7224a582 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h @@ -357,6 +357,7 @@ extern int mce_threshold_remove_device(unsigned int cpu); void mce_amd_feature_init(struct cpuinfo_x86 *c); int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr); +void smca_extract_err_addr(struct mce *m); #else @@ -366,6 +367,7 @@ static inline bool amd_mce_is_memory_error(struct mce *m) { return false; }; static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { } static inline int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) { return -EINVAL; }; +static inline void smca_extract_err_addr(struct mce *m) { } #endif static inline void mce_hygon_feature_init(struct cpuinfo_x86 *c) { return mce_amd_feature_init(c); } diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c index 08831acc1d03..f71435e53cdb 100644 --- a/arch/x86/kernel/cpu/mce/amd.c +++ b/arch/x86/kernel/cpu/mce/amd.c @@ -899,6 +899,13 @@ bool amd_mce_is_memory_error(struct mce *m) return m->bank == 4 && xec == 0x8; } +void smca_extract_err_addr(struct mce *m) +{ + u8 lsb = (m->addr >> 56) & 0x3f; + + m->addr &= GENMASK_ULL(55, lsb); +} + static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc) { struct mce m; @@ -917,11 +924,8 @@ static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc) * Extract [55:] where lsb is the least significant * *valid* bit of the address bits. */ - if (mce_flags.smca) { - u8 lsb = (m.addr >> 56) & 0x3f; - - m.addr &= GENMASK_ULL(55, lsb); - } + if (mce_flags.smca) + smca_extract_err_addr(&m); } if (mce_flags.smca) { diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index bf7fe87a7e88..2c09c1eec50a 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -703,11 +703,8 @@ static void mce_read_aux(struct mce *m, int i) * Extract [55:] where lsb is the least significant * *valid* bit of the address bits. */ - if (mce_flags.smca) { - u8 lsb = (m->addr >> 56) & 0x3f; - - m->addr &= GENMASK_ULL(55, lsb); - } + if (mce_flags.smca) + smca_extract_err_addr(m); } if (mce_flags.smca) {