diff mbox series

EDAC/sb_edac: Fix top-of-high-memory value for Broadwell/Haswell

Message ID 20211010170127.848113-1-ebadger@purestorage.com (mailing list archive)
State New, archived
Headers show
Series EDAC/sb_edac: Fix top-of-high-memory value for Broadwell/Haswell | expand

Commit Message

Eric Badger Oct. 10, 2021, 5:06 p.m. UTC 
The computation of TOHM is off by one bit. This missed bit results in
too low a value for TOHM, which can cause errors in regular memory to
incorrectly report:

  EDAC MC0: 1 CE Error at MMIOH area, on addr 0x000000207fffa680 on any memory

Reported-by: Meeta Saggi <msaggi@purestorage.com>
Signed-off-by: Eric Badger <ebadger@purestorage.com>
---
 drivers/edac/sb_edac.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--

Comments

Luck, Tony Oct. 11, 2021, 3:34 p.m. UTC | #1 
On Sun, Oct 10, 2021 at 10:06:56AM -0700, Eric Badger wrote:
> The computation of TOHM is off by one bit. This missed bit results in
> too low a value for TOHM, which can cause errors in regular memory to
> incorrectly report:
> 
>   EDAC MC0: 1 CE Error at MMIOH area, on addr 0x000000207fffa680 on any memory
> 
> Reported-by: Meeta Saggi <msaggi@purestorage.com>
> Signed-off-by: Eric Badger <ebadger@purestorage.com>

Applied (with added Fixes: tag and Cc: stable).

Thanks

-Tony
diff mbox series

Patch

diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
index 4c626fc..1522d4a 100644
--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -1052,7 +1052,7 @@  static u64 haswell_get_tohm(struct sbridge_pvt *pvt)
 	pci_read_config_dword(pvt->info.pci_vtd, HASWELL_TOHM_1, &reg);
 	rc = ((reg << 6) | rc) << 26;
 
-	return rc | 0x1ffffff;
+	return rc | 0x3ffffff;
 }
 
 static u64 knl_get_tolm(struct sbridge_pvt *pvt)