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Peter Anvin" , , Subject: [PATCH v2 2/5] x86/mce/inject: Warn the user on a not set valid bit in MCA_STATUS Date: Tue, 19 Oct 2021 18:36:38 -0500 Message-ID: <20211019233641.140275-3-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211019233641.140275-1-Smita.KoralahalliChannabasappa@amd.com> References: <20211019233641.140275-1-Smita.KoralahalliChannabasappa@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 80a549fb-a272-42c6-2ae9-08d993595c3f X-MS-TrafficTypeDiagnostic: DM6PR12MB3594: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4125; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5ykbMmHFN2QUAxHsO5Axzeoox00DXFs0nAH8ezxUPe1rJQAVqrPwXYDjVfTAV0uhuf8n8Uv/r2jVXqGdnvf1ZbRtgKo/6BiHgvIfn3vS9tQTe/bGCbnpQhXHcoNqbsywUV60hYQwL9by5MHKNx8zNUiaOcQr2Ye4OCQww1Y00JitE4yX+gJtOa5I8J+2a3tsPdfxBfNqnPfRVNYGJA+u5JM7dSkcspHlYtxkEvj0BOS6pGN5SD8wMm0vRVF9OY63ybeKtNPAzKTm+YoZas2oIGmE0YAXgg2OaRw8RNxoJMHuICSR0TGH/4CJUyb2foZDZBQbDL9zCSkJxGGihbom9SlX33CrJWbf86bBDjEWx0gykouiIhYy0Vx2N2JfTK7+lYMIAmNFyDW8mXl/EVavbChujhxYnJDHfBEmVyXLRB4PHhuYzgH0KCazpmeD2DHCgv1HMRzf4AnGZY2d0Mp+F1mn9yzuibpU/R5KC0WhybnNT1hHLFpAWtI3soRnCs9sbO6Dck8WF0CU9EoPgnpZ8lSQG4c3f0vtZBF1apG5r0iQC05aGKCtA9hgG1Xvu0lyxnJX5hb8f+Z9EBjMp8+nMiXDcyZ974m/uFLL7CiFB8jf0xEs/P3lyQw4U/lfnC3/hDrjljfBHJFnP1WpBZxfAtSpxMDSTS5t3Jv5gGoSpRHh3U6EOky5M57/ukC45ewXas0Ise+RDfwsM5I2fIYqT0S5/fQIIPCmgh2FnESKodk= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(36840700001)(46966006)(2906002)(6666004)(356005)(7696005)(47076005)(82310400003)(4326008)(8936002)(86362001)(5660300002)(508600001)(81166007)(36860700001)(1076003)(54906003)(110136005)(16526019)(8676002)(186003)(4744005)(316002)(336012)(70206006)(83380400001)(36756003)(70586007)(426003)(26005)(2616005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Oct 2021 23:37:05.6013 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 80a549fb-a272-42c6-2ae9-08d993595c3f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT008.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3594 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org MCA handlers check the valid bit in each status register (MCA_STATUS[Val]) and will likely ignore signatures if the valid bit is not set. Warn the user if the valid bit is not set before doing error injection. Signed-off-by: Smita Koralahalli --- v2: Added a warning statement instead of setting the valid bit. --- arch/x86/kernel/cpu/mce/inject.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/kernel/cpu/mce/inject.c b/arch/x86/kernel/cpu/mce/inject.c index 601efd104bb4..a993dc3d0333 100644 --- a/arch/x86/kernel/cpu/mce/inject.c +++ b/arch/x86/kernel/cpu/mce/inject.c @@ -487,6 +487,9 @@ static void do_inject(void) i_mce.tsc = rdtsc_ordered(); + if (!(i_mce.status & MCI_STATUS_VAL)) + pr_warn("Handlers might ignore signatures with Val=0 in MCA_STATUS\n"); + if (i_mce.misc) i_mce.status |= MCI_STATUS_MISCV;