Message ID | 20211028175728.121452-32-yazen.ghannam@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Series |
AMD MCA Address Translation Updates
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expand
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diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 5dacd7e03202..07009901a283 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1092,6 +1092,7 @@ struct addr_ctx { u8 intlv_num_sockets; u8 cs_id; u8 node_id_shift; + bool late_hole_remove; int (*dehash_addr)(struct addr_ctx *ctx); void (*make_space_for_cs_id)(struct addr_ctx *ctx); void (*insert_cs_id)(struct addr_ctx *ctx); @@ -1638,12 +1639,15 @@ static int umc_normaddr_to_sysaddr(u64 *addr, u16 nid, u8 df_inst_id) if (denormalize_addr(&ctx)) return -EINVAL; - if (add_base_and_hole(&ctx)) + if (!ctx.late_hole_remove && add_base_and_hole(&ctx)) return -EINVAL; if (ctx.dehash_addr && ctx.dehash_addr(&ctx)) return -EINVAL; + if (ctx.late_hole_remove && add_base_and_hole(&ctx)) + return -EINVAL; + if (addr_over_limit(&ctx)) return -EINVAL;
Some DF versions and interleaving modes require the DRAM base address and hole adjustments to be done before accounting for hashing. Others require this to be done after. Add a check for this behavior. Save a boolean in the ctx struct which can be appropriately set based on DF version or interleaving mode. Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> --- v2->v3: * New in v3. drivers/edac/amd64_edac.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)