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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2021 17:58:06.5554 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e6cc2e98-c6bb-4447-a408-08d99a3c7ee2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT059.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW2PR12MB2444 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Define a stub to hold operations for different Data Fabric versions. This will be filled in following patches. Set the operations at init-time as appropriate for each model/family group. Signed-off-by: Yazen Ghannam --- Link: https://lkml.kernel.org/r/20210623192002.3671647-7-yazen.ghannam@amd.com v2->v3: * Was patch 6 in v2. * "df_ops" is set at init time. v1->v2: * New in v2. drivers/edac/amd64_edac.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 3fb137ea74b3..f83f9813294d 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1056,6 +1056,14 @@ struct addr_ctx { u8 inst_id; }; +struct data_fabric_ops { +}; + +struct data_fabric_ops df2_ops = { +}; + +struct data_fabric_ops *df_ops; + static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) { u64 dram_base_addr, dram_limit_addr, dram_hole_base; @@ -1070,6 +1078,9 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr struct addr_ctx ctx; + if (!df_ops) + return -EINVAL; + memset(&ctx, 0, sizeof(ctx)); /* We start from the normalized address */ @@ -4190,6 +4201,7 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) if (pvt->model >= 0x10 && pvt->model <= 0x2f) { pvt->fam_type = &family_types[F17_M10H_CPUS]; pvt->ops = &family_types[F17_M10H_CPUS].ops; + df_ops = &df2_ops; break; } else if (pvt->model >= 0x30 && pvt->model <= 0x3f) { pvt->fam_type = &family_types[F17_M30H_CPUS]; @@ -4208,6 +4220,7 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) case 0x18: pvt->fam_type = &family_types[F17_CPUS]; pvt->ops = &family_types[F17_CPUS].ops; + df_ops = &df2_ops; if (pvt->fam == 0x18) family_types[F17_CPUS].ctl_name = "F18h";