@@ -484,23 +484,19 @@ static void prepare_msrs(void *info)
u8 b = m.bank;
u32 status_reg = MSR_IA32_MCx_STATUS(b);
-
- wrmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
+ u32 addr_reg = MSR_IA32_MCx_ADDR(b);
+ u32 misc_reg = MSR_IA32_MCx_MISC(b);
if (boot_cpu_has(X86_FEATURE_SMCA)) {
if (m.inject_flags == DFR_INT_INJ) {
status_reg = MSR_AMD64_SMCA_MCx_DESTAT(b);
- wrmsrl(MSR_AMD64_SMCA_MCx_DEADDR(b), m.addr);
+ addr_reg = MSR_AMD64_SMCA_MCx_DEADDR(b);
} else {
status_reg = MSR_AMD64_SMCA_MCx_STATUS(b);
- wrmsrl(MSR_AMD64_SMCA_MCx_ADDR(b), m.addr);
+ addr_reg = MSR_AMD64_SMCA_MCx_ADDR(b);
}
- wrmsrl(MSR_AMD64_SMCA_MCx_MISC(b), m.misc);
- wrmsrl(MSR_AMD64_SMCA_MCx_SYND(b), m.synd);
- } else {
- wrmsrl(MSR_IA32_MCx_ADDR(b), m.addr);
- wrmsrl(MSR_IA32_MCx_MISC(b), m.misc);
+ misc_reg = MSR_AMD64_SMCA_MCx_MISC(b);
}
wrmsrl(status_reg, m.status);
@@ -511,6 +507,13 @@ static void prepare_msrs(void *info)
i_mce_err->err = -EINVAL;
return;
}
+
+ wrmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
+ wrmsrl(addr_reg, m.addr);
+ wrmsrl(misc_reg, m.misc);
+
+ if (boot_cpu_has(X86_FEATURE_SMCA))
+ wrmsrl(MSR_AMD64_SMCA_MCx_SYND(b), m.synd);
}
static void do_inject(void)
Rearrange the calls and write to registers MCx_{ADDR, MISC, SYND} and MCG_STATUS so that they are only done if error injection is available. Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> --- arch/x86/kernel/cpu/mce/inject.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-)