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Peter Anvin" , James Morse , Robert Richter , Yazen Ghannam , Smita Koralahalli Subject: [PATCH v3 1/4] x86/mce: Define function to extract ErrorAddr from MCA_ADDR Date: Fri, 11 Feb 2022 16:34:39 -0600 Message-ID: <20220211223442.254489-2-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220211223442.254489-1-Smita.KoralahalliChannabasappa@amd.com> References: <20220211223442.254489-1-Smita.KoralahalliChannabasappa@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 3fb3b19a-3694-4475-bcbd-08d9edaec4cd X-MS-TrafficTypeDiagnostic: BYAPR12MB4710:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4125; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: XBtV9Ds8FUzK1dIOPeJ4aeAzWNKtdVd1QXhpjqNzwIhS+idffKBDC8rwEd413v1hXXbnwL2GmNVBrgbnfgddKyxW8G4ZEidOsEI3RzuGyX59u2Gm4eDV2b6zJn2sbb6YM1VQp+LwWNk3TaKzy5ou5CRp0gArLziICM4xFSZT+uP3ySrTZMdMI9hq5ZxdSF/5kxRDYNAMRJSHQkz1cOJLPlIQqdMTR6FfeuBY2/WDrM3zTW4Afi7RGyhGbhmBpiMXnHXnHt2DoSTzcXYQiEUJbXldJuXmFu2vpQ175Gx7XPXAKXDsX7P5gH8cTBMabvF+AJVhz3jWM4HAsy3PFeFZkzRfoG0ReFn8Mqy4KUMH3LYoJDAkvr4z+bcBb114kFcjH+LBjrD56Rd7O0TPvprlHaSQXsiI7QYPIdPKFtfovEpGE5fYfpaOWW7jl/44rjgguyADlI5M1CH5yF50EcBBdhtJLv6HwKAKibRPHkyy8qEW+pwHRYIerzlNgRPYcDqsbwXisfAa+Qs3g2HczQunCLGexVtPjX3siccjh3ZHCYY/vnz5MCTfRUCXkYtdrYFICsUOs6NwogzsV545vzhH6yfT9ZsGr7k7OBhJPQLKEz+nY6B8HAEuEbYmEcXXCDRraoP/eeouLDdKiOu3gtoOklwf9/YX93jcWm2B/XX+b+FxIBjqXrdOulJs3Sf8vX8w87cmV0KdoghcPuyoHUuhCCVKu79lNBCdHjL25wvIuFG9iDLNmNiwc0VTMogLMOSzzovCXoyVuz3kXujyQvcaTL1kmknzjLTZeajHMwvQ04c= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(40470700004)(46966006)(36840700001)(2906002)(16526019)(316002)(336012)(426003)(5660300002)(82310400004)(1076003)(70206006)(8676002)(8936002)(70586007)(4326008)(110136005)(54906003)(26005)(186003)(2616005)(81166007)(83380400001)(36860700001)(47076005)(356005)(40460700003)(86362001)(6666004)(966005)(36756003)(7696005)(508600001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Feb 2022 22:35:12.7327 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3fb3b19a-3694-4475-bcbd-08d9edaec4cd X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT046.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB4710 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Move MCA_ADDR[ErrorAddr] extraction into a separate helper function. This will be further refactored in the next patch. Signed-off-by: Smita Koralahalli Reviewed-by: Yazen Ghannam --- Link: https://lkml.kernel.org/r/20210625013341.231442-1-Smita.KoralahalliChannabasappa@amd.com v2: No change. v3: Rebased on the latest tip tree. No functional changes. --- arch/x86/include/asm/mce.h | 2 ++ arch/x86/kernel/cpu/mce/amd.c | 14 +++++++++----- arch/x86/kernel/cpu/mce/core.c | 7 ++----- 3 files changed, 13 insertions(+), 10 deletions(-) diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index cc73061e7255..99a4c32cbdfa 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h @@ -337,12 +337,14 @@ extern int mce_threshold_remove_device(unsigned int cpu); void mce_amd_feature_init(struct cpuinfo_x86 *c); enum smca_bank_types smca_get_bank_type(unsigned int cpu, unsigned int bank); +void smca_extract_err_addr(struct mce *m); #else static inline int mce_threshold_create_device(unsigned int cpu) { return 0; }; static inline int mce_threshold_remove_device(unsigned int cpu) { return 0; }; static inline bool amd_mce_is_memory_error(struct mce *m) { return false; }; static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { } +static inline void smca_extract_err_addr(struct mce *m) { } #endif static inline void mce_hygon_feature_init(struct cpuinfo_x86 *c) { return mce_amd_feature_init(c); } diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c index 1940d305db1c..981d718851a2 100644 --- a/arch/x86/kernel/cpu/mce/amd.c +++ b/arch/x86/kernel/cpu/mce/amd.c @@ -722,6 +722,13 @@ bool amd_mce_is_memory_error(struct mce *m) return m->bank == 4 && xec == 0x8; } +void smca_extract_err_addr(struct mce *m) +{ + u8 lsb = (m->addr >> 56) & 0x3f; + + m->addr &= GENMASK_ULL(55, lsb); +} + static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc) { struct mce m; @@ -740,11 +747,8 @@ static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc) * Extract [55:] where lsb is the least significant * *valid* bit of the address bits. */ - if (mce_flags.smca) { - u8 lsb = (m.addr >> 56) & 0x3f; - - m.addr &= GENMASK_ULL(55, lsb); - } + if (mce_flags.smca) + smca_extract_err_addr(&m); } if (mce_flags.smca) { diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c index 4f1e825033ce..f031f2668523 100644 --- a/arch/x86/kernel/cpu/mce/core.c +++ b/arch/x86/kernel/cpu/mce/core.c @@ -664,11 +664,8 @@ static noinstr void mce_read_aux(struct mce *m, int i) * Extract [55:] where lsb is the least significant * *valid* bit of the address bits. */ - if (mce_flags.smca) { - u8 lsb = (m->addr >> 56) & 0x3f; - - m->addr &= GENMASK_ULL(55, lsb); - } + if (mce_flags.smca) + smca_extract_err_addr(m); } if (mce_flags.smca) {