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Peter Anvin" , James Morse , Robert Richter , Yazen Ghannam , Smita Koralahalli Subject: [PATCH v3 4/4] x86/mce: Avoid unnecessary padding in struct mce_bank Date: Fri, 11 Feb 2022 16:34:42 -0600 Message-ID: <20220211223442.254489-5-Smita.KoralahalliChannabasappa@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220211223442.254489-1-Smita.KoralahalliChannabasappa@amd.com> References: <20220211223442.254489-1-Smita.KoralahalliChannabasappa@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6f100913-e4a5-4dce-7efa-08d9edaec7a3 X-MS-TrafficTypeDiagnostic: CO6PR12MB5473:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5797; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: eImNijFTLtn83nCLus8mFv/Wtg+Fibh/y+nKrc6tPX09FgmbuO0PKqvSyxXIF9+sX6QXiygPycnVM31KnGzUDatUgJ8q6ZILYh4qd3MLXEc4dlhg0ilC39wtJET46jvRogGlbU9fl4/fY8ozGUk2geMre2XeXWrBABwfrA4TXfxgc/Os8cWjbItbiuAqaKo6gRx1G/JvYQ9J09SFFT7yoUSmjhVCxOE0rkIoZEr4wynrAZ+YsBOKkK1oLIg/R+IqQpsGPApOgycmjO1QldUVQXr6gtlLFyQOlg5MpvHNF/8Wqc+CgBq0b2Pg2Gkk5P9MGuf+pMTokHuw7Fu9ta7QGdo/NB8OEWchqoXLWHrGN+Q3AOCJ6IYG/zC5vQnjjdhYBfy511BftjD2mnrusK0WTCT2w40p5kg6mQ6EEjwTGypWdvTMtvpBPHeTPAUpF5wuk4xM5Ym4TyqYQfa+rJQZrZVT7wpnn2A2V61XyPLcH6Y3H041DaOeNSACqA0ar/AlWlf5JSs2Vd1n8YJ2rjG0tD90zYBBaz6R1O+eY7edRLo+AGHq+2An36zRy0hRrz+etlkSmZZxEsjYUpkaQcz3Y/PopAhUVt1Wbt4UpFTI4r7/t/uNcYbYZAJR946X/CYjonbMMRjSVUxBmglzRSlm2CLLCcLHxHtOG/jSCIku9C06uJZMwkP+2XY7S2YQ21tTnXIikZJHxd7Ee1iiAXm9UA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(46966006)(40470700004)(36840700001)(316002)(81166007)(8676002)(186003)(54906003)(26005)(16526019)(110136005)(8936002)(70206006)(82310400004)(5660300002)(2906002)(356005)(4326008)(70586007)(86362001)(47076005)(508600001)(40460700003)(36756003)(83380400001)(1076003)(426003)(336012)(7696005)(6666004)(2616005)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Feb 2022 22:35:17.8015 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6f100913-e4a5-4dce-7efa-08d9edaec7a3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT049.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CO6PR12MB5473 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org Include struct mce_bank member "init" in the bitfield by changing its type from bool to get rid of unnecessary padding and to reduce the overall struct size. Outputs collected before and after the change. $ pahole -C mce_bank arch/x86/kernel/cpu/mce/core.o before: /* size: 24, cachelines: 1, members: 5 */ /* bit holes: 1, sum bit holes: 62 bits */ /* bit_padding: 2 bits */ /* last cacheline: 24 bytes */ after: /* size: 16, cachelines: 1, members: 5 */ /* last cacheline: 16 bytes */ No functional changes. Signed-off-by: Smita Koralahalli Reviewed-by: Yazen Ghannam --- arch/x86/kernel/cpu/mce/internal.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/mce/internal.h b/arch/x86/kernel/cpu/mce/internal.h index 422387f8699d..0b0f55f0c585 100644 --- a/arch/x86/kernel/cpu/mce/internal.h +++ b/arch/x86/kernel/cpu/mce/internal.h @@ -177,13 +177,14 @@ extern struct mce_vendor_flags mce_flags; struct mce_bank { u64 ctl; /* subevents to enable */ - bool init; /* initialise bank? */ + + __u64 init : 1, /* initialise bank? */ /* * (AMD) MCA_CONFIG[McaLsbInStatusSupported]: This bit indicates * the LSB field is found in MCA_STATUS, when set. */ - __u64 lsb_in_status : 1, + lsb_in_status : 1, /* * (AMD) MCA_CONFIG[McaX]: This bit when set indicates a given @@ -195,7 +196,7 @@ struct mce_bank { */ mcax : 1, - __reserved_1 : 62; + __reserved_1 : 61; }; DECLARE_PER_CPU_READ_MOSTLY(struct mce_bank[MAX_NR_BANKS], mce_banks_array);