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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Feb 2022 16:14:47.3279 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6799f269-247c-4193-484c-08d9fad5709c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT044.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB5485 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Muralidhara M K Add function pointer for populate_csrows() in pvt->ops and assign family specific populate_csrows() definitions appropriately Signed-off-by: Muralidhara M K Signed-off-by: Naveen Krishna Chatradhi --- This patch is created by splitting the 5/12th patch in series [v7 5/12] https://patchwork.kernel.org/project/linux-edac/patch/20220203174942.31630-6-nchatrad@amd.com/ drivers/edac/amd64_edac.c | 13 ++++++++----- drivers/edac/amd64_edac.h | 1 + 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index c86674c3238d..a799594c9574 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -3430,9 +3430,6 @@ static int init_csrows(struct mem_ctl_info *mci) int nr_pages = 0; u32 val; - if (pvt->umc) - return init_csrows_df(mci); - amd64_read_pci_cfg(pvt->F3, NBCFG, &val); pvt->nbcfg = val; @@ -3805,6 +3802,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->determine_edac_cap = f1x_determine_edac_cap; pvt->ops->determine_edac_ctl_cap = f1x_determine_edac_ctl_cap; pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; + pvt->ops->populate_csrows = init_csrows; break; case 0x10: @@ -3823,6 +3821,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->determine_edac_cap = f1x_determine_edac_cap; pvt->ops->determine_edac_ctl_cap = f1x_determine_edac_ctl_cap; pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; + pvt->ops->populate_csrows = init_csrows; break; case 0x15: @@ -3857,6 +3856,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->determine_edac_cap = f1x_determine_edac_cap; pvt->ops->determine_edac_ctl_cap = f1x_determine_edac_ctl_cap; pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; + pvt->ops->populate_csrows = init_csrows; break; case 0x16: @@ -3881,6 +3881,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->determine_edac_cap = f1x_determine_edac_cap; pvt->ops->determine_edac_ctl_cap = f1x_determine_edac_ctl_cap; pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; + pvt->ops->populate_csrows = init_csrows; break; case 0x17: @@ -3919,6 +3920,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->determine_edac_cap = f17_determine_edac_cap; pvt->ops->determine_edac_ctl_cap = f17_determine_edac_ctl_cap; pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; + pvt->ops->populate_csrows = init_csrows_df; if (pvt->fam == 0x18) { pvt->ctl_name = "F18h"; @@ -3963,6 +3965,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->determine_edac_cap = f17_determine_edac_cap; pvt->ops->determine_edac_ctl_cap = f17_determine_edac_ctl_cap; pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; + pvt->ops->populate_csrows = init_csrows_df; break; default: @@ -3976,7 +3979,7 @@ static int per_family_init(struct amd64_pvt *pvt) !pvt->ops->determine_memory_type || !pvt->ops->determine_ecc_sym_sz || !pvt->ops->get_mc_regs || !pvt->ops->ecc_enabled || !pvt->ops->determine_edac_cap || !pvt->ops->determine_edac_ctl_cap || - !pvt->ops->setup_mci_misc_attrs) { + !pvt->ops->setup_mci_misc_attrs || !pvt->ops->populate_csrows) { edac_dbg(1, "Common helper routines not defined.\n"); return -EFAULT; } @@ -4073,7 +4076,7 @@ static int init_one_instance(struct amd64_pvt *pvt) pvt->ops->setup_mci_misc_attrs(mci); - if (init_csrows(mci)) + if (pvt->ops->populate_csrows(mci)) mci->edac_cap = EDAC_FLAG_NONE; ret = -ENODEV; diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index 1ffee0009a53..c762b341650f 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -473,6 +473,7 @@ struct low_ops { unsigned long (*determine_edac_cap)(struct amd64_pvt *pvt); void (*determine_edac_ctl_cap)(struct mem_ctl_info *mci, struct amd64_pvt *pvt); void (*setup_mci_misc_attrs)(struct mem_ctl_info *mci); + int (*populate_csrows)(struct mem_ctl_info *mci); }; int __amd64_read_pci_cfg_dword(struct pci_dev *pdev, int offset,