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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Feb 2022 16:14:54.6868 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0f7e9d6f-4064-4ef2-28de-08d9fad574ff X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT044.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB3908 Precedence: bulk List-ID: X-Mailing-List: linux-edac@vger.kernel.org From: Muralidhara M K Add function pointer for get_cs_mode() in pvt->ops and assign family specific get_cs_mode() definitions appropriately. Signed-off-by: Muralidhara M K Signed-off-by: Naveen Krishna Chatradhi --- This patch is created by splitting the 5/12th patch in series [v7 5/12] https://patchwork.kernel.org/project/linux-edac/patch/20220203174942.31630-6-nchatrad@amd.com/ drivers/edac/amd64_edac.c | 23 +++++++++++++++-------- drivers/edac/amd64_edac.h | 1 + 2 files changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 1063dda20ce9..7a20f8a696de 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1347,6 +1347,13 @@ static void debug_dump_dramcfg_low(struct amd64_pvt *pvt, u32 dclr, int chan) #define CS_EVEN (CS_EVEN_PRIMARY | CS_EVEN_SECONDARY) #define CS_ODD (CS_ODD_PRIMARY | CS_ODD_SECONDARY) +static int f1x_get_cs_mode(int dimm, u8 ctrl, struct amd64_pvt *pvt) +{ + u32 dbam = ctrl ? pvt->dbam1 : pvt->dbam0; + + return DBAM_DIMM(dimm, dbam); +} + static int f17_get_cs_mode(int dimm, u8 ctrl, struct amd64_pvt *pvt) { u8 base, count = 0; @@ -3346,16 +3353,10 @@ static void read_mc_regs(struct amd64_pvt *pvt) */ static u32 get_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr_orig) { - u32 dbam = dct ? pvt->dbam1 : pvt->dbam0; int csrow_nr = csrow_nr_orig; u32 cs_mode, nr_pages; - if (!pvt->umc) { - csrow_nr >>= 1; - cs_mode = DBAM_DIMM(csrow_nr, dbam); - } else { - cs_mode = f17_get_cs_mode(csrow_nr >> 1, dct, pvt); - } + cs_mode = pvt->ops->get_cs_mode(csrow_nr >> 1, dct, pvt); nr_pages = pvt->ops->dbam_to_cs(pvt, dct, cs_mode, csrow_nr); nr_pages <<= 20 - PAGE_SHIFT; @@ -3799,6 +3800,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; pvt->ops->populate_csrows = init_csrows; pvt->ops->dump_misc_regs = __dump_misc_regs; + pvt->ops->get_cs_mode = f1x_get_cs_mode; break; case 0x10: @@ -3819,6 +3821,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; pvt->ops->populate_csrows = init_csrows; pvt->ops->dump_misc_regs = __dump_misc_regs; + pvt->ops->get_cs_mode = f1x_get_cs_mode; break; case 0x15: @@ -3855,6 +3858,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; pvt->ops->populate_csrows = init_csrows; pvt->ops->dump_misc_regs = __dump_misc_regs; + pvt->ops->get_cs_mode = f1x_get_cs_mode; break; case 0x16: @@ -3881,6 +3885,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; pvt->ops->populate_csrows = init_csrows; pvt->ops->dump_misc_regs = __dump_misc_regs; + pvt->ops->get_cs_mode = f1x_get_cs_mode; break; case 0x17: @@ -3921,6 +3926,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; pvt->ops->populate_csrows = init_csrows_df; pvt->ops->dump_misc_regs = __dump_misc_regs_df; + pvt->ops->get_cs_mode = f17_get_cs_mode; if (pvt->fam == 0x18) { pvt->ctl_name = "F18h"; @@ -3967,6 +3973,7 @@ static int per_family_init(struct amd64_pvt *pvt) pvt->ops->setup_mci_misc_attrs = f1x_setup_mci_misc_attrs; pvt->ops->populate_csrows = init_csrows_df; pvt->ops->dump_misc_regs = __dump_misc_regs_df; + pvt->ops->get_cs_mode = f17_get_cs_mode; break; default: @@ -3981,7 +3988,7 @@ static int per_family_init(struct amd64_pvt *pvt) !pvt->ops->get_mc_regs || !pvt->ops->ecc_enabled || !pvt->ops->determine_edac_cap || !pvt->ops->determine_edac_ctl_cap || !pvt->ops->setup_mci_misc_attrs || !pvt->ops->populate_csrows || - !pvt->ops->dump_misc_regs) { + !pvt->ops->dump_misc_regs || !pvt->ops->get_cs_mode) { edac_dbg(1, "Common helper routines not defined.\n"); return -EFAULT; } diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index 7b377dba0dc7..2c93f8e0021a 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h @@ -475,6 +475,7 @@ struct low_ops { void (*setup_mci_misc_attrs)(struct mem_ctl_info *mci); int (*populate_csrows)(struct mem_ctl_info *mci); void (*dump_misc_regs)(struct amd64_pvt *pvt); + int (*get_cs_mode)(int dimm, u8 ctrl, struct amd64_pvt *pvt); }; int __amd64_read_pci_cfg_dword(struct pci_dev *pdev, int offset,