From patchwork Mon Sep 30 07:59:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jingoo Han X-Patchwork-Id: 2962801 Return-Path: X-Original-To: patchwork-linux-fbdev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 49D83BFF0B for ; Mon, 30 Sep 2013 07:59:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1676320173 for ; Mon, 30 Sep 2013 07:59:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BDC1D201A4 for ; Mon, 30 Sep 2013 07:59:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752230Ab3I3H7e (ORCPT ); Mon, 30 Sep 2013 03:59:34 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:29574 "EHLO mailout2.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751809Ab3I3H7d (ORCPT ); Mon, 30 Sep 2013 03:59:33 -0400 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MTX00L0GI6VUVJ0@mailout2.samsung.com>; Mon, 30 Sep 2013 16:59:32 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [203.254.230.47]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id B9.04.20109.36F29425; Mon, 30 Sep 2013 16:59:31 +0900 (KST) X-AuditID: cbfee68f-b7f1e6d000004e8d-d9-52492f63111f Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 47.AE.09055.36F29425; Mon, 30 Sep 2013 16:59:31 +0900 (KST) Received: from DOJG1HAN03 ([12.23.120.99]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MTX005VQI77S170@mmp2.samsung.com>; Mon, 30 Sep 2013 16:59:31 +0900 (KST) From: Jingoo Han To: 'Kishon Vijay Abraham I' Cc: 'Greg Kroah-Hartman' , linux-fbdev@vger.kernel.org, linux-samsung-soc@vger.kernel.org, 'Kukjin Kim' , 'Tomi Valkeinen' , 'Jean-Christophe Plagniol-Villard' , 'Sylwester Nawrocki' , 'Jingoo Han' References: <000f01cebdb2$d1a20e10$74e62a30$%han@samsung.com> In-reply-to: <000f01cebdb2$d1a20e10$74e62a30$%han@samsung.com> Subject: [PATCH V8 1/3] phy: Add driver for Exynos DP PHY Date: Mon, 30 Sep 2013 16:59:31 +0900 Message-id: <001901cebdb2$feb5f8d0$fc21ea70$%han@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=US-ASCII Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Ac69stGDJcNGlmTjTaOadWBk38OXaAAABxfg Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrDIsWRmVeSWpSXmKPExsVy+t8zfd1kfc8gg12TLSxeHtK0aF68ns3i 8sJLrBa9C66yWVx42sNmcaLvA6vFjPP7mCzWPXzBZHH4TTurxfr5t9gcuDxeXbjD4rF/7hp2 j74tqxg9jt/YzuTxeZNcAGsUl01Kak5mWWqRvl0CV8asx71MBbO0K77NZ21gfKzcxcjBISFg InFjM3MXIyeQKSZx4d56ti5GLg4hgWWMEq2L/jHB1Jw+UQERn84oMffoJBaQBiGBX4wSxy8X gthsAmoSX74cZgexRQR0JBaeXs8M0sAs8IBJ4tS5xewQDbYSM/6eZgSxOQXsJP7OO8sKYgsL WEq8mnWYGWQZi4CqxMV5xSBhXqDy/U/mskDYghI/Jt8Ds5kFtCQ2b2tihbDlJTavecsMcae6 xKO/uhAnGEl8nvgOqlxEYt+Ld4wg50gINHJIvD/7EOwcFgEBiW+TD7FA9MpKbDoADQdJiYMr brBMYJSYhWTzLCSbZyHZPAvJigWMLKsYRVMLkguKk9KLjPWKE3OLS/PS9ZLzczcxQmK6fwfj 3QPWhxiTgdZPZJYSTc4HpoS8knhDYzMjC1MTU2Mjc0sz0oSVxHnVWqwDhQTSE0tSs1NTC1KL 4otKc1KLDzEycXBKNTAafnl19uAZ3x29c0LuzJ9quEPio/jR+/MZdwU+/BH0eD1PlKByofGH VZMWT2fwEbDI61Vnvv3+1PdY/nsbKqQtD64QLbn65ITjMfOFuZomaRe4Py68mFDyROWSDudD K6bY6PqfilNddgXHLuDd+m9hyIfvr01PHGG2OnTRKPxIWtpW45nc9+pWK7EUZyQaajEXFScC ADH7Pbf/AgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrFKsWRmVeSWpSXmKPExsVy+t9jQd1kfc8gg6lHjSxeHtK0aF68ns3i 8sJLrBa9C66yWVx42sNmcaLvA6vFjPP7mCzWPXzBZHH4TTurxfr5t9gcuDxeXbjD4rF/7hp2 j74tqxg9jt/YzuTxeZNcAGtUA6NNRmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGuoaWFuZJC XmJuqq2Si0+ArltmDtBVSgpliTmlQKGAxOJiJX07TBNCQ9x0LWAaI3R9Q4LgeowM0EDCOsaM WY97mQpmaVd8m8/awPhYuYuRg0NCwETi9ImKLkZOIFNM4sK99WxdjFwcQgLTGSXmHp3EApIQ EvjFKHH8ciGIzSagJvHly2F2EFtEQEdi4en1zCANzAIPmCROnVvMDtFgKzHj72lGEJtTwE7i 77yzrCC2sIClxKtZh5lBFrMIqEpcnFcMEuYFKt//ZC4LhC0o8WPyPTCbWUBLYvO2JlYIW15i 85q3zBA3q0s8+qsLcYKRxOeJ76DKRST2vXjHOIFRaBaSSbOQTJqFZNIsJC0LGFlWMYqmFiQX FCel5xrqFSfmFpfmpesl5+duYgSnjGdSOxhXNlgcYhTgYFTi4Z2w3CNIiDWxrLgy9xCjBAez kgjvVz7PICHelMTKqtSi/Pii0pzU4kOMyUB/TmSWEk3OB6azvJJ4Q2MTMyNLIzMLIxNzc9KE lcR5D7RaBwoJpCeWpGanphakFsFsYeLglGpgPJlwT3B/sWxHUODlCRF+/5++kLrvwGDx9G3t uSVnXxnEx/HPWx/IlrDkg2ZRvvHEC6GffzMGGClvTp8h0ernfkqwaueOTTkhvWKlN9mbVxef lTnBvlTgoPqE3UECwavmLnZiLfqntqWsblt7tf7UP5/Wnjkun1ipu/27TqF8dc3L+w+v7PmV osRSnJFoqMVcVJwIAIPZIORdAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add a PHY provider driver for the Samsung Exynos SoC Display Port PHY. Signed-off-by: Jingoo Han Reviewed-by: Tomasz Figa Cc: Sylwester Nawrocki Acked-by: Felipe Balbi --- .../devicetree/bindings/phy/samsung-phy.txt | 8 ++ drivers/phy/Kconfig | 7 ++ drivers/phy/Makefile | 1 + drivers/phy/phy-exynos-dp-video.c | 111 ++++++++++++++++++++ 4 files changed, 127 insertions(+) create mode 100644 drivers/phy/phy-exynos-dp-video.c diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt index 5ff208c..c0fccaa 100644 --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt @@ -12,3 +12,11 @@ the PHY specifier identifies the PHY and its meaning is as follows: 1 - MIPI DSIM 0, 2 - MIPI CSIS 1, 3 - MIPI DSIM 1. + +Samsung EXYNOS SoC series Display Port PHY +------------------------------------------------- + +Required properties: +- compatible : should be "samsung,exynos5250-dp-video-phy"; +- reg : offset and length of the Display Port PHY register set; +- #phy-cells : from the generic PHY bindings, must be 0; diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 0062d7e..a344f3d 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -44,4 +44,11 @@ config TWL4030_USB This transceiver supports high and full speed devices plus, in host mode, low speed. +config PHY_EXYNOS_DP_VIDEO + tristate "EXYNOS SoC series Display Port PHY driver" + depends on OF + select GENERIC_PHY + help + Support for Display Port PHY found on Samsung EXYNOS SoCs. + endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 6344053..d0caae9 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -3,6 +3,7 @@ # obj-$(CONFIG_GENERIC_PHY) += phy-core.o +obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o obj-$(CONFIG_OMAP_USB2) += phy-omap-usb2.o obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o diff --git a/drivers/phy/phy-exynos-dp-video.c b/drivers/phy/phy-exynos-dp-video.c new file mode 100644 index 0000000..1dbe6ce --- /dev/null +++ b/drivers/phy/phy-exynos-dp-video.c @@ -0,0 +1,111 @@ +/* + * Samsung EXYNOS SoC series Display Port PHY driver + * + * Copyright (C) 2013 Samsung Electronics Co., Ltd. + * Author: Jingoo Han + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* DPTX_PHY_CONTROL register */ +#define EXYNOS_DPTX_PHY_ENABLE (1 << 0) + +struct exynos_dp_video_phy { + void __iomem *regs; +}; + +static int __set_phy_state(struct exynos_dp_video_phy *state, unsigned int on) +{ + u32 reg; + + reg = readl(state->regs); + if (on) + reg |= EXYNOS_DPTX_PHY_ENABLE; + else + reg &= ~EXYNOS_DPTX_PHY_ENABLE; + writel(reg, state->regs); + + return 0; +} + +static int exynos_dp_video_phy_power_on(struct phy *phy) +{ + struct exynos_dp_video_phy *state = phy_get_drvdata(phy); + + return __set_phy_state(state, 1); +} + +static int exynos_dp_video_phy_power_off(struct phy *phy) +{ + struct exynos_dp_video_phy *state = phy_get_drvdata(phy); + + return __set_phy_state(state, 0); +} + +static struct phy_ops exynos_dp_video_phy_ops = { + .power_on = exynos_dp_video_phy_power_on, + .power_off = exynos_dp_video_phy_power_off, + .owner = THIS_MODULE, +}; + +static int exynos_dp_video_phy_probe(struct platform_device *pdev) +{ + struct exynos_dp_video_phy *state; + struct device *dev = &pdev->dev; + struct resource *res; + struct phy_provider *phy_provider; + struct phy *phy; + + state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL); + if (!state) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + state->regs = devm_ioremap_resource(dev, res); + if (IS_ERR(state->regs)) + return PTR_ERR(state->regs); + + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + if (IS_ERR(phy_provider)) + return PTR_ERR(phy_provider); + + phy = devm_phy_create(dev, &exynos_dp_video_phy_ops, NULL); + if (IS_ERR(phy)) { + dev_err(dev, "failed to create Display Port PHY\n"); + return PTR_ERR(phy); + } + phy_set_drvdata(phy, state); + + return 0; +} + +static const struct of_device_id exynos_dp_video_phy_of_match[] = { + { .compatible = "samsung,exynos5250-dp-video-phy" }, + { }, +}; +MODULE_DEVICE_TABLE(of, exynos_dp_video_phy_of_match); + +static struct platform_driver exynos_dp_video_phy_driver = { + .probe = exynos_dp_video_phy_probe, + .driver = { + .name = "exynos-dp-video-phy", + .owner = THIS_MODULE, + .of_match_table = exynos_dp_video_phy_of_match, + } +}; +module_platform_driver(exynos_dp_video_phy_driver); + +MODULE_AUTHOR("Jingoo Han "); +MODULE_DESCRIPTION("Samsung EXYNOS SoC DP PHY driver"); +MODULE_LICENSE("GPL v2");