From patchwork Thu Dec 9 13:47:21 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 394392 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oB9DljF9031293 for ; Thu, 9 Dec 2010 13:47:49 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753800Ab0LINrl (ORCPT ); Thu, 9 Dec 2010 08:47:41 -0500 Received: from metis.ext.pengutronix.de ([92.198.50.35]:42259 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753848Ab0LINrb (ORCPT ); Thu, 9 Dec 2010 08:47:31 -0500 Received: from octopus.hi.pengutronix.de ([2001:6f8:1178:2:215:17ff:fe12:23b0]) by metis.ext.pengutronix.de with esmtp (Exim 4.71) (envelope-from ) id 1PQgqG-0001es-0i; Thu, 09 Dec 2010 14:47:28 +0100 Received: from sha by octopus.hi.pengutronix.de with local (Exim 4.69) (envelope-from ) id 1PQgqF-0006cd-D4; Thu, 09 Dec 2010 14:47:27 +0100 From: Sascha Hauer To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-fbdev@vger.kernel.org, Zhang Lily-R58066 , Arnaud Patard , Sascha Hauer Subject: [PATCH 9/9] ARM i.MX51 babbage: Add framebuffer support Date: Thu, 9 Dec 2010 14:47:21 +0100 Message-Id: <1291902441-24712-10-git-send-email-s.hauer@pengutronix.de> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1291902441-24712-1-git-send-email-s.hauer@pengutronix.de> References: <1291902441-24712-1-git-send-email-s.hauer@pengutronix.de> X-SA-Exim-Connect-IP: 2001:6f8:1178:2:215:17ff:fe12:23b0 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-fbdev@vger.kernel.org Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Thu, 09 Dec 2010 13:47:49 +0000 (UTC) diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 5011f42..2a936b7 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig @@ -22,6 +22,7 @@ config MACH_MX51_BABBAGE select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select IMX_HAVE_PLATFORM_SPI_IMX + select IMX_HAVE_PLATFORM_IMX_IPUV3 help Include support for MX51 Babbage platform, also known as MX51EVK in u-boot. This includes specific configurations for the board and its diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index a896f84..169c48c 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c @@ -22,11 +22,13 @@ #include #include #include +#include #include #include #include #include +#include #include #include @@ -158,6 +160,41 @@ static iomux_v3_cfg_t mx51babbage_pads[] = { MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK, MX51_PAD_CSPI1_SS0__GPIO_4_24, MX51_PAD_CSPI1_SS1__GPIO_4_25, + + /* Display */ + MX51_PAD_DISPB2_SER_DIN__GPIO_3_5, + MX51_PAD_DISPB2_SER_DIO__GPIO_3_6, + MX51_PAD_NANDF_D12__GPIO_3_28, + + MX51_PAD_DISP1_DAT0__DISP1_DAT0, + MX51_PAD_DISP1_DAT1__DISP1_DAT1, + MX51_PAD_DISP1_DAT2__DISP1_DAT2, + MX51_PAD_DISP1_DAT3__DISP1_DAT3, + MX51_PAD_DISP1_DAT4__DISP1_DAT4, + MX51_PAD_DISP1_DAT5__DISP1_DAT5, + MX51_PAD_DISP1_DAT6__DISP1_DAT6, + MX51_PAD_DISP1_DAT7__DISP1_DAT7, + MX51_PAD_DISP1_DAT8__DISP1_DAT8, + MX51_PAD_DISP1_DAT9__DISP1_DAT9, + MX51_PAD_DISP1_DAT10__DISP1_DAT10, + MX51_PAD_DISP1_DAT11__DISP1_DAT11, + MX51_PAD_DISP1_DAT12__DISP1_DAT12, + MX51_PAD_DISP1_DAT13__DISP1_DAT13, + MX51_PAD_DISP1_DAT14__DISP1_DAT14, + MX51_PAD_DISP1_DAT15__DISP1_DAT15, + MX51_PAD_DISP1_DAT16__DISP1_DAT16, + MX51_PAD_DISP1_DAT17__DISP1_DAT17, + MX51_PAD_DISP1_DAT18__DISP1_DAT18, + MX51_PAD_DISP1_DAT19__DISP1_DAT19, + MX51_PAD_DISP1_DAT20__DISP1_DAT20, + MX51_PAD_DISP1_DAT21__DISP1_DAT21, + MX51_PAD_DISP1_DAT22__DISP1_DAT22, + MX51_PAD_DISP1_DAT23__DISP1_DAT23, +#define MX51_PAD_DI_GP4__IPU_DI2_PIN15 IOMUX_PAD(0x758, 0x350, 4, 0x0, 0, NO_PAD_CTRL) + MX51_PAD_DI_GP4__IPU_DI2_PIN15, + + /* I2C DVI enable */ + MX51_PAD_CSI2_HSYNC__GPIO_4_14, }; /* Serial ports */ @@ -342,6 +379,21 @@ static const struct spi_imx_master mx51_babbage_spi_pdata __initconst = { .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs), }; +static struct ipuv3_fb_platform_data babbage_fb0_data = { + .interface_pix_fmt = IPU_PIX_FMT_RGB24, + .flags = IMX_IPU_FB_USE_MODEDB | IMX_IPU_FB_USE_OVERLAY, +}; + +static struct ipuv3_fb_platform_data babbage_fb1_data = { + .interface_pix_fmt = IPU_PIX_FMT_RGB565, + .flags = IMX_IPU_FB_USE_MODEDB, +}; + +static struct imx_ipuv3_platform_data ipu_data = { + .fb0_platform_data = &babbage_fb0_data, + .fb1_platform_data = &babbage_fb1_data, +}; + /* * Board specific initialization. */ @@ -388,6 +440,28 @@ static void __init mxc_board_init(void) ARRAY_SIZE(mx51_babbage_spi_board_info)); imx51_add_ecspi(0, &mx51_babbage_spi_pdata); imx51_add_imx2_wdt(0, NULL); + +#define GPIO_DVI_DETECT (2 * 32 + 28) +#define GPIO_DVI_RESET (2 * 32 + 5) +#define GPIO_DVI_PWRDN (2 * 32 + 6) +#define GPIO_DVI_I2C (3 * 32 + 14) + + /* DVI Detect */ + gpio_request(GPIO_DVI_DETECT, "dvi detect"); + gpio_direction_input(GPIO_DVI_DETECT); + /* DVI Reset - Assert for i2c disabled mode */ + gpio_request(GPIO_DVI_RESET, "dvi reset"); + gpio_set_value(GPIO_DVI_RESET, 0); + gpio_direction_output(GPIO_DVI_RESET, 0); + /* DVI Power-down */ + gpio_request(GPIO_DVI_PWRDN, "dvi pwdn"); + gpio_direction_output(GPIO_DVI_PWRDN, 0); + gpio_set_value(GPIO_DVI_PWRDN, 1); + + gpio_request(GPIO_DVI_I2C, "dvi i2c"); + gpio_direction_output(GPIO_DVI_I2C, 0); + + imx51_add_ipuv3(&ipu_data); } static void __init mx51_babbage_timer_init(void)