From patchwork Wed Jan 5 10:35:52 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Inki Dae X-Patchwork-Id: 453171 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p05AWTE7028625 for ; Wed, 5 Jan 2011 10:35:58 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751692Ab1AEKf6 (ORCPT ); Wed, 5 Jan 2011 05:35:58 -0500 Received: from mailout3.samsung.com ([203.254.224.33]:40347 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751591Ab1AEKfz (ORCPT ); Wed, 5 Jan 2011 05:35:55 -0500 Received: from epmmp1 (mailout3.samsung.com [203.254.224.33]) by mailout3.samsung.com (Oracle Communications Messaging Exchange Server 7u4-19.01 64bit (built Sep 7 2010)) with ESMTP id <0LEJ00DK5PFTH740@mailout3.samsung.com> for linux-fbdev@vger.kernel.org; Wed, 05 Jan 2011 19:35:53 +0900 (KST) Received: from TNRNDGASPAPP1.tn.corp.samsungelectronics.net ([165.213.149.150]) by mmp1.samsung.com (iPlanet Messaging Server 5.2 Patch 2 (built Jul 14 2004)) with ESMTPA id <0LEJ001QRPFTPR@mmp1.samsung.com> for linux-fbdev@vger.kernel.org; Wed, 05 Jan 2011 19:35:53 +0900 (KST) Received: from localhost.localdomain ([10.89.10.123]) by TNRNDGASPAPP1.tn.corp.samsungelectronics.net with Microsoft SMTPSVC(6.0.3790.4675); Wed, 05 Jan 2011 19:35:53 +0900 Date: Wed, 05 Jan 2011 19:35:52 +0900 From: Inki Dae Subject: [PATCH 2/2] s5pc110: add MIPI-DSI controller driver. To: linux-fbdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: kyungmin.park@samsung.com, lethal@linux-sh.org, akpm@linux-foundation.org, kgene.kim@samsung.com, Inki Dae Message-id: <1294223752-31896-1-git-send-email-inki.dae@samsung.com> X-Mailer: git-send-email 1.7.0.4 Content-transfer-encoding: 7BIT X-OriginalArrivalTime: 05 Jan 2011 10:35:53.0227 (UTC) FILETIME=[53F42DB0:01CBACC4] Sender: linux-fbdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-fbdev@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 05 Jan 2011 10:35:59 +0000 (UTC) diff --git a/arch/arm/plat-s5p/include/plat/dsim.h b/arch/arm/plat-s5p/include/plat/dsim.h new file mode 100644 index 0000000..9aa5a93 --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/dsim.h @@ -0,0 +1,357 @@ +/* linux/arm/arch/plat-s5p/include/plat/dsim.h + * + * Platform data header for Samsung SoC MIPI-DSIM. + * + * Copyright (c) 2009 Samsung Electronics + * InKi Dae + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef _DSIM_H +#define _DSIM_H + +#include +#include + +#define PANEL_NAME_SIZE (32) + +enum mipi_dsim_interface_type { + DSIM_COMMAND, + DSIM_VIDEO +}; + +enum mipi_dsim_virtual_ch_no { + DSIM_VIRTUAL_CH_0, + DSIM_VIRTUAL_CH_1, + DSIM_VIRTUAL_CH_2, + DSIM_VIRTUAL_CH_3 +}; + +enum mipi_dsim_burst_mode_type { + DSIM_NON_BURST_SYNC_EVENT, + DSIM_NON_BURST_SYNC_PULSE = 2, + DSIM_BURST, + DSIM_NON_VIDEO_MODE +}; + +enum mipi_dsim_no_of_data_lane { + DSIM_DATA_LANE_1, + DSIM_DATA_LANE_2, + DSIM_DATA_LANE_3, + DSIM_DATA_LANE_4 +}; + +enum mipi_dsim_byte_clk_src { + DSIM_PLL_OUT_DIV8, + DSIM_EXT_CLK_DIV8, + DSIM_EXT_CLK_BYPASS +}; + +enum mipi_dsim_pixel_format { + DSIM_CMD_3BPP, + DSIM_CMD_8BPP, + DSIM_CMD_12BPP, + DSIM_CMD_16BPP, + DSIM_VID_16BPP_565, + DSIM_VID_18BPP_666PACKED, + DSIM_18BPP_666LOOSELYPACKED, + DSIM_24BPP_888 +}; + +/** + * struct mipi_dsim_config - interface for configuring mipi-dsi controller. + * + * @auto_flush: enable or disable Auto flush of MD FIFO using VSYNC pulse. + * @eot_disable: enable or disable EoT packet in HS mode. + * @auto_vertical_cnt: specifies auto vertical count mode. + * in Video mode, the vertical line transition uses line counter + * configured by VSA, VBP, and Vertical resolution. + * If this bit is set to '1', the line counter does not use VSA and VBP + * registers.(in command mode, this variable is ignored) + * @hse: set horizontal sync event mode. + * In VSYNC pulse and Vporch area, MIPI DSI master transfers only HSYNC + * start packet to MIPI DSI slave at MIPI DSI spec1.1r02. + * this bit transfers HSYNC end packet in VSYNC pulse and Vporch area + * (in mommand mode, this variable is ignored) + * @hfp: specifies HFP disable mode. + * if this variable is set, DSI master ignores HFP area in VIDEO mode. + * (in command mode, this variable is ignored) + * @hbp: specifies HBP disable mode. + * if this variable is set, DSI master ignores HBP area in VIDEO mode. + * (in command mode, this variable is ignored) + * @hsa: specifies HSA disable mode. + * if this variable is set, DSI master ignores HSA area in VIDEO mode. + * (in command mode, this variable is ignored) + * @e_interface: specifies interface to be used.(CPU or RGB interface) + * @e_virtual_ch: specifies virtual channel number that main or + * sub diaplsy uses. + * @e_pixel_format: specifies pixel stream format for main or sub display. + * @e_burst_mode: selects Burst mode in Video mode. + * in Non-burst mode, RGB data area is filled with RGB data and NULL + * packets, according to input bandwidth of RGB interface. + * In Burst mode, RGB data area is filled with RGB data only. + * @e_no_data_lane: specifies data lane count to be used by Master. + * @e_byte_clk: select byte clock source. (it must be DSIM_PLL_OUT_DIV8) + * DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported. + * @pll_stable_time: specifies the PLL Timer for stability of the ganerated + * clock(System clock cycle base) + * if the timer value goes to 0x00000000, the clock stable bit of status + * and interrupt register is set. + * @esc_clk: specifies escape clock frequency for getting the escape clock + * prescaler value. + * @stop_holding_cnt: specifies the interval value between transmitting + * read packet(or write "set_tear_on" command) and BTA request. + * after transmitting read packet or write "set_tear_on" command, + * BTA requests to D-PHY automatically. this counter value specifies + * the interval between them. + * @bta_timeout: specifies the timer for BTA. + * this register specifies time out from BTA request to change + * the direction with respect to Tx escape clock. + * @rx_timeout: specifies the timer for LP Rx mode timeout. + * this register specifies time out on how long RxValid deasserts, + * after RxLpdt asserts with respect to Tx escape clock. + * - RxValid specifies Rx data valid indicator. + * - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode. + * - RxValid and RxLpdt specifies signal from D-PHY. + * @lcd_panel_info: pointer for lcd panel specific structure. + * this structure specifies width, height, timing and polarity and so on. + * @mipi_ddi_pd: pointer to lcd panel platform data. + */ +struct mipi_dsim_config { + unsigned char auto_flush; + unsigned char eot_disable; + + unsigned char auto_vertical_cnt; + unsigned char hse; + unsigned char hfp; + unsigned char hbp; + unsigned char hsa; + + enum mipi_dsim_interface_type e_interface; + enum mipi_dsim_virtual_ch_no e_virtual_ch; + enum mipi_dsim_pixel_format e_pixel_format; + enum mipi_dsim_burst_mode_type e_burst_mode; + enum mipi_dsim_no_of_data_lane e_no_data_lane; + enum mipi_dsim_byte_clk_src e_byte_clk; + + /* + * =========================================== + * | P | M | S | MHz | + * ------------------------------------------- + * | 3 | 100 | 3 | 100 | + * | 3 | 100 | 2 | 200 | + * | 3 | 63 | 1 | 252 | + * | 4 | 100 | 1 | 300 | + * | 4 | 110 | 1 | 330 | + * | 12 | 350 | 1 | 350 | + * | 3 | 100 | 1 | 400 | + * | 4 | 150 | 1 | 450 | + * | 3 | 118 | 1 | 472 | + * | 12 | 250 | 0 | 500 | + * | 4 | 100 | 0 | 600 | + * | 3 | 81 | 0 | 648 | + * | 3 | 88 | 0 | 704 | + * | 3 | 90 | 0 | 720 | + * | 3 | 100 | 0 | 800 | + * | 12 | 425 | 0 | 850 | + * | 4 | 150 | 0 | 900 | + * | 12 | 475 | 0 | 950 | + * | 6 | 250 | 0 | 1000 | + * ------------------------------------------- + */ + unsigned char p; + unsigned short m; + unsigned char s; + + unsigned int pll_stable_time; + unsigned long esc_clk; + + unsigned short stop_holding_cnt; + unsigned char bta_timeout; + unsigned short rx_timeout; + + void *lcd_panel_info; + void *dsim_ddi_pd; +}; + +/** + * struct mipi_dsim_device - global interface for mipi-dsi driver. + * + * @dev: driver model representation of the device. + * @clock: pointer to MIPI-DSI clock of clock framework. + * @irq: interrupt number to MIPI-DSI controller. + * @reg_base: base address to memory mapped SRF of MIPI-DSI controller. + * (virtual address) + * @pd: pointer to MIPI-DSI driver platform data. + * @dsim_info: infomation for configuring mipi-dsi controller. + * @master_ops: callbacks to mipi-dsi operations. + * @lcd_info: pointer to mipi_lcd_info structure. + * @state: specifies status of MIPI-DSI controller. + * the status could be RESET, INIT, STOP, HSCLKEN and ULPS. + * @resume_complete: indicates whether resume operation is completed or not. + * @data_lane: specifiec enabled data lane number. + * this variable would be set by driver according to e_no_data_lane + * automatically. + * @e_clk_src: select byte clock source. + * this variable would be set by driver according to e_byte_clock + * automatically. + * @hs_clk: HS clock rate. + * this variable would be set by driver automatically. + * @byte_clk: Byte clock rate. + * this variable would be set by driver automatically. + * @escape_clk: ESCAPE clock rate. + * this variable would be set by driver automatically. + * @freq_band: indicates Bitclk frequency band for D-PHY global timing. + * Serial Clock(=ByteClk X 8) FreqBand[3:0] + * ~ 99.99 MHz 0000 + * 100 ~ 119.99 MHz 0001 + * 120 ~ 159.99 MHz 0010 + * 160 ~ 199.99 MHz 0011 + * 200 ~ 239.99 MHz 0100 + * 140 ~ 319.99 MHz 0101 + * 320 ~ 389.99 MHz 0110 + * 390 ~ 449.99 MHz 0111 + * 450 ~ 509.99 MHz 1000 + * 510 ~ 559.99 MHz 1001 + * 560 ~ 639.99 MHz 1010 + * 640 ~ 689.99 MHz 1011 + * 690 ~ 769.99 MHz 1100 + * 770 ~ 869.99 MHz 1101 + * 870 ~ 949.99 MHz 1110 + * 950 ~ 1000 MHz 1111 + * this variable would be calculated by driver automatically. + */ +struct mipi_dsim_device { + struct device *dev; + struct resource *res; + struct clk *clock; + unsigned int irq; + void __iomem *reg_base; + + struct s5p_platform_mipi_dsim *pd; + struct mipi_dsim_config *dsim_config; + struct mipi_dsim_master_ops *master_ops; + struct mipi_dsim_ddi *dsim_ddi; + + unsigned int state; + unsigned int resume_complete; + unsigned int data_lane; + enum mipi_dsim_byte_clk_src e_clk_src; + unsigned long hs_clk; + unsigned long byte_clk; + unsigned long escape_clk; + unsigned char freq_band; +}; + +/** + * struct s5p_platform_mipi_dsim - interface to platform data + * for mipi-dsi driver. + * + * @lcd_panel_name: specifies lcd panel name registered to mipi-dsi driver. + * lcd panel driver searched would be actived. + * @dsim_config: pointer of structure for configuring mipi-dsi controller. + * @dsim_lcd_info: pointer to structure for configuring + * mipi-dsi based lcd panel. + * @mipi_power: callback pointer for enabling or disabling mipi power. + * @part_reset: callback pointer for reseting mipi phy. + * @init_d_phy: callback pointer for enabing d_phy of dsi master. + * @get_fb_frame_done: callback pointer for getting frame done status of the + * display controller(FIMD). + * @trigger: callback pointer for triggering display controller(FIMD) + * in case of CPU mode. + * @delay_for_stabilization: specifies stable time. + * this delay needs when writing data on SFR + * after mipi mode became LP mode. + */ +struct s5p_platform_mipi_dsim { + char lcd_panel_name[PANEL_NAME_SIZE]; + + struct mipi_dsim_config *dsim_config; + struct mipi_dsim_lcd_config *dsim_lcd_config; + + unsigned int delay_for_stabilization; + + int (*mipi_power) (struct mipi_dsim_device *dsim, unsigned int enable); + int (*part_reset) (struct mipi_dsim_device *dsim); + int (*init_d_phy) (struct mipi_dsim_device *dsim); + int (*get_fb_frame_done) (struct fb_info *info); + void (*trigger) (struct fb_info *info); +}; +/** + * struct mipi_dsim_master_ops - callbacks to mipi-dsi operations. + * + * @cmd_write: transfer command to lcd panel at LP mode. + * @cmd_read: read command from rx register. + * @get_dsim_frame_done: get the status that all screen data have been + * transferred to mipi-dsi. + * @clear_dsim_frame_done: clear frame done status. + * @change_dsim_transfer_mode: change transfer mode to LP or HS mode. + * - LP mode is used when commands data ard transferred to lcd panel. + * @get_fb_frame_done: get frame done status of display controller. + * @trigger: trigger display controller. + * - this one would be used only in case of CPU mode. + */ + +struct mipi_dsim_master_ops { + int (*cmd_write) (struct mipi_dsim_device *dsim, unsigned int data_id, + unsigned int data0, unsigned int data1); + int (*cmd_read) (struct mipi_dsim_device *dsim, unsigned int data_id, + unsigned int data0, unsigned int data1); + int (*get_dsim_frame_done) (struct mipi_dsim_device *dsim); + int (*clear_dsim_frame_done) (struct mipi_dsim_device *dsim); + + int (*change_dsim_transfer_mode) (struct mipi_dsim_device *dsim, + unsigned int mode); + + int (*get_fb_frame_done) (struct fb_info *info); + void (*trigger) (struct fb_info *info); +}; + +/** + * device structure for mipi-dsi based lcd panel. + * + * @dev: driver model representation of the device. + * @id: id of device registered and when device is registered + * id would be counted. + * @modalias: name of the driver to use with this device, or an + * alias for that name. + * @mipi_lcd_drv: pointer of mipi_lcd_driver. + * @master: pointer to dsim_device. + */ +struct mipi_dsim_lcd_device { + struct device dev; + int id; + char modalias[64]; + + struct mipi_dsim_lcd_driver *dsim_drv; + struct mipi_dsim_device *master; +}; + +/** + * driver structure for mipi-dsi based lcd panel. + * + * this structure should be registered by lcd panel driver. + * mipi-dsi driver seeks lcd panel registered through name field + * and calls these callback functions in appropriate time. + */ +struct mipi_dsim_lcd_driver { + char *name; + + int (*probe)(struct mipi_dsim_lcd_device *dsim_dev); + int (*remove)(struct mipi_dsim_lcd_device *dsim_dev); + void (*shutdown)(struct mipi_dsim_lcd_device *dsim_dev); + int (*suspend)(struct mipi_dsim_lcd_device *dsim_dev); + int (*resume)(struct mipi_dsim_lcd_device *dsim_dev); +}; + +/** + * register mipi_dsim_lcd_driver object defined by lcd panel driver + * to mipi-dsi driver. + */ +extern int s5p_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver + *lcd_drv); + +#endif /* _DSIM_H */ diff --git a/arch/arm/plat-s5p/include/plat/regs-dsim.h b/arch/arm/plat-s5p/include/plat/regs-dsim.h new file mode 100644 index 0000000..7ef5a2f --- /dev/null +++ b/arch/arm/plat-s5p/include/plat/regs-dsim.h @@ -0,0 +1,141 @@ +/* linux/arch/arm/plat-s5p/include/plat/regs-dsim.h + * + * Register definition file for Samsung MIPI-DSIM driver + * + * InKi Dae , Copyright (c) 2009 Samsung Electronics + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef _REGS_DSIM_H +#define _REGS_DSIM_H + +#define S5P_DSIM_STATUS (0x0) /* Status register */ +#define S5P_DSIM_SWRST (0x4) /* Software reset register */ +#define S5P_DSIM_CLKCTRL (0x8) /* Clock control register */ +#define S5P_DSIM_TIMEOUT (0xc) /* Time out register */ +#define S5P_DSIM_CONFIG (0x10) /* Configuration register */ +#define S5P_DSIM_ESCMODE (0x14) /* Escape mode register */ + +/* Main display image resolution register */ +#define S5P_DSIM_MDRESOL (0x18) +#define S5P_DSIM_MVPORCH (0x1c) /* Main display Vporch register */ +#define S5P_DSIM_MHPORCH (0x20) /* Main display Hporch register */ +#define S5P_DSIM_MSYNC (0x24) /* Main display sync area register */ + +/* Sub display image resolution register */ +#define S5P_DSIM_SDRESOL (0x28) +#define S5P_DSIM_INTSRC (0x2c) /* Interrupt source register */ +#define S5P_DSIM_INTMSK (0x30) /* Interrupt mask register */ +#define S5P_DSIM_PKTHDR (0x34) /* Packet Header FIFO register */ +#define S5P_DSIM_PAYLOAD (0x38) /* Payload FIFO register */ +#define S5P_DSIM_RXFIFO (0x3c) /* Read FIFO register */ +#define S5P_DSIM_FIFOTHLD (0x40) /* FIFO threshold level register */ +#define S5P_DSIM_FIFOCTRL (0x44) /* FIFO status and control register */ + +/* FIFO memory AC characteristic register */ +#define S5P_DSIM_PLLCTRL (0x4c) /* PLL control register */ +#define S5P_DSIM_PLLTMR (0x50) /* PLL timer register */ +#define S5P_DSIM_PHYACCHR (0x54) /* D-PHY AC characteristic register */ +#define S5P_DSIM_PHYACCHR1 (0x58) /* D-PHY AC characteristic register1 */ + +/* DSIM_STATUS */ +#define DSIM_STOP_STATE_DAT(x) (((x) & 0xf) << 0) +#define DSIM_STOP_STATE_CLK (1 << 8) +#define DSIM_TX_READY_HS_CLK (1 << 10) + +/* DSIM_SWRST */ +#define DSIM_FUNCRST (1 << 16) +#define DSIM_SWRST (1 << 0) + +/* S5P_DSIM_TIMEOUT */ +#define DSIM_LPDR_TOUT_SHIFT (0) +#define DSIM_BTA_TOUT_SHIFT (16) + +/* S5P_DSIM_CLKCTRL */ +#define DSIM_LANE_ESC_CLKEN_SHIFT (19) +#define DSIM_BYTE_CLKEN_SHIFT (24) +#define DSIM_BYTE_CLK_SRC_SHIFT (25) +#define DSIM_PLL_BYPASS_SHIFT (27) +#define DSIM_ESC_CLKEN_SHIFT (28) +#define DSIM_TX_REQUEST_HSCLK_SHIFT (31) +#define DSIM_LANE_ESC_CLKEN(x) (((x) & 0x1f) << \ + DSIM_LANE_ESC_CLKEN_SHIFT) +#define DSIM_BYTE_CLK_ENABLE (1 << DSIM_BYTE_CLKEN_SHIFT) +#define DSIM_BYTE_CLK_DISABLE (0 << DSIM_BYTE_CLKEN_SHIFT) +#define DSIM_PLL_BYPASS_EXTERNAL (1 << DSIM_PLL_BYPASS_SHIFT) +#define DSIM_ESC_CLKEN_ENABLE (1 << DSIM_ESC_CLKEN_SHIFT) +#define DSIM_ESC_CLKEN_DISABLE (0 << DSIM_ESC_CLKEN_SHIFT) + +/* S5P_DSIM_CONFIG */ +#define DSIM_NUM_OF_DATALANE_SHIFT (5) +#define DSIM_HSA_MODE_SHIFT (20) +#define DSIM_HBP_MODE_SHIFT (21) +#define DSIM_HFP_MODE_SHIFT (22) +#define DSIM_HSE_MODE_SHIFT (23) +#define DSIM_AUTO_MODE_SHIFT (24) +#define DSIM_LANE_ENx(x) (((x) & 0x1f) << 0) + +#define DSIM_NUM_OF_DATA_LANE(x) ((x) << DSIM_NUM_OF_DATALANE_SHIFT) + +/* S5P_DSIM_ESCMODE */ +#define DSIM_TX_LPDT_SHIFT (6) +#define DSIM_CMD_LPDT_SHIFT (7) +#define DSIM_TX_LPDT_LP (1 << DSIM_TX_LPDT_SHIFT) +#define DSIM_CMD_LPDT_LP (1 << DSIM_CMD_LPDT_SHIFT) +#define DSIM_STOP_STATE_CNT_SHIFT (21) +#define DSIM_FORCE_STOP_STATE_SHIFT (20) + +/* S5P_DSIM_MDRESOL */ +#define DSIM_MAIN_STAND_BY (1 << 31) +#define DSIM_MAIN_VRESOL(x) (((x) & 0x7ff) << 16) +#define DSIM_MAIN_HRESOL(x) (((x) & 0X7ff) << 0) + +/* S5P_DSIM_MVPORCH */ +#define DSIM_CMD_ALLOW_SHIFT (28) +#define DSIM_STABLE_VFP_SHIFT (16) +#define DSIM_MAIN_VBP_SHIFT (0) +#define DSIM_CMD_ALLOW_MASK (0xf << DSIM_CMD_ALLOW_SHIFT) +#define DSIM_STABLE_VFP_MASK (0x7ff << DSIM_STABLE_VFP_SHIFT) +#define DSIM_MAIN_VBP_MASK (0x7ff << DSIM_MAIN_VBP_SHIFT) + +/* S5P_DSIM_MHPORCH */ +#define DSIM_MAIN_HFP_SHIFT (16) +#define DSIM_MAIN_HBP_SHIFT (0) +#define DSIM_MAIN_HFP_MASK ((0xffff) << DSIM_MAIN_HFP_SHIFT) +#define DSIM_MAIN_HBP_MASK ((0xffff) << DSIM_MAIN_HBP_SHIFT) + +/* S5P_DSIM_MSYNC */ +#define DSIM_MAIN_VSA_SHIFT (22) +#define DSIM_MAIN_HSA_SHIFT (0) +#define DSIM_MAIN_VSA_MASK ((0x3ff) << DSIM_MAIN_VSA_SHIFT) +#define DSIM_MAIN_HSA_MASK ((0xffff) << DSIM_MAIN_HSA_SHIFT) + +/* S5P_DSIM_SDRESOL */ +#define DSIM_SUB_STANDY_SHIFT (31) +#define DSIM_SUB_VRESOL_SHIFT (16) +#define DSIM_SUB_HRESOL_SHIFT (0) +#define DSIM_SUB_STANDY_MASK ((0x1) << DSIM_SUB_STANDY_SHIFT) +#define DSIM_SUB_VRESOL_MASK ((0x7ff) << DSIM_SUB_VRESOL_SHIFT) +#define DSIM_SUB_HRESOL_MASK ((0x7ff) << DSIM_SUB_HRESOL_SHIFT) + +/* S5P_DSIM_INTSRC */ +#define INTSRC_FRAME_DONE (1 << 24) +#define INTSRC_PLL_STABLE (1 << 31) + +/* S5P_DSIM_INTMSK */ +#define INTMSK_FRAME_DONE (1 << 24) + +/* S5P_DSIM_FIFOCTRL */ +#define SFR_HEADER_EMPTY (1 << 22) + +/* S5P_DSIM_PHYACCHR */ +#define DSIM_AFC_CTL(x) (((x) & 0x7) << 5) + +/* S5P_DSIM_PLLCTRL */ +#define DSIM_PLL_EN_SHIFT (23) +#define DSIM_FREQ_BAND_SHIFT (24) + +#endif /* _REGS_DSIM_H */ diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 932e7bb..9744e32 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -2098,6 +2098,13 @@ config FB_S3C2410_DEBUG Turn on debugging messages. Note that you can set/unset at run time through sysfs +config S5P_MIPI_DSI + tristate "Samsung SoC MIPI-DSI support." + depends on FB_S3C && ARCH_S5PV210 + default n + ---help--- + This enables support for MIPI-DSI device. + config FB_NUC900 bool "NUC900 LCD framebuffer support" depends on FB && ARCH_W90X900 diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 36aca21..12052a2 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -119,6 +119,8 @@ obj-$(CONFIG_FB_SH7760) += sh7760fb.o obj-$(CONFIG_FB_IMX) += imxfb.o obj-$(CONFIG_FB_S3C) += s3c-fb.o obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o +obj-$(CONFIG_S5P_MIPI_DSI) += s5p_mipi_dsi.o s5p_mipi_dsi_common.o \ + s5p_mipi_dsi_lowlevel.o obj-$(CONFIG_FB_FSL_DIU) += fsl-diu-fb.o obj-$(CONFIG_FB_COBALT) += cobalt_lcdfb.o obj-$(CONFIG_FB_PNX4008_DUM) += pnx4008/ diff --git a/drivers/video/s5p_mipi_dsi.c b/drivers/video/s5p_mipi_dsi.c new file mode 100644 index 0000000..0bd9a44 --- /dev/null +++ b/drivers/video/s5p_mipi_dsi.c @@ -0,0 +1,428 @@ +/* linux/drivers/video/s5p_mipi_dsi.c + * + * Samsung SoC MIPI-DSIM driver. + * + * InKi Dae, + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include "s5p_mipi_dsi_common.h" + +#define master_to_driver(a) (a->dsim_ddi->dsim_lcd_drv) +#define master_to_device(a) (a->dsim_ddi->dsim_lcd_dev) +#define set_master_to_device(a) (a->dsim_ddi->dsim_lcd_dev->master = a) + +struct mipi_dsim_ddi { + struct list_head list; + struct mipi_dsim_lcd_driver *dsim_lcd_drv; + struct mipi_dsim_lcd_device *dsim_lcd_dev; +}; + +static LIST_HEAD(dsim_ddi_list); +static DEFINE_MUTEX(mipi_lock); + +static struct s5p_platform_mipi_dsim *to_dsim_plat(struct platform_device *pdev) +{ + return (struct s5p_platform_mipi_dsim *)pdev->dev.platform_data; +} + +static irqreturn_t s5p_mipi_dsi_interrupt_handler(int irq, void *dev_id) +{ + return IRQ_HANDLED; +} + +int s5p_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver *lcd_drv) +{ + struct mipi_dsim_ddi *dsim_ddi; + struct mipi_dsim_lcd_device *dsim_lcd_dev; + static unsigned int id; + int ret; + + dsim_ddi = kzalloc(sizeof(struct mipi_dsim_ddi), GFP_KERNEL); + if (!dsim_ddi) { + printk(KERN_ERR "failed to allocate dsim_ddi object.\n"); + return -EFAULT; + } + + dsim_ddi->dsim_lcd_drv = lcd_drv; + + dsim_lcd_dev = kzalloc(sizeof(struct mipi_dsim_lcd_device), GFP_KERNEL); + if (!dsim_lcd_dev) { + printk(KERN_ERR "failed to allocate dsim_lcd_dev object.\n"); + ret = -EFAULT; + goto err_dsim; + } + + mutex_lock(&mipi_lock); + + dsim_lcd_dev->id = id++; + dsim_ddi->dsim_lcd_dev = dsim_lcd_dev; + + device_initialize(&dsim_lcd_dev->dev); + + strcpy(dsim_lcd_dev->modalias, lcd_drv->name); + + dev_set_name(&dsim_lcd_dev->dev, "mipi-dsi.%d\n", dsim_lcd_dev->id); + + ret = device_add(&dsim_lcd_dev->dev); + if (ret < 0) { + printk(KERN_ERR "can't %s %s, status %d\n", + "add", dev_name(&dsim_lcd_dev->dev), ret); + id--; + goto err_device_add; + } + + list_add_tail(&dsim_ddi->list, &dsim_ddi_list); + + mutex_unlock(&mipi_lock); + + printk(KERN_DEBUG "registered panel driver(%s) to mipi-dsi driver.\n", + lcd_drv->name); + + return ret; + +err_device_add: + kfree(dsim_lcd_dev); + +err_dsim: + kfree(dsim_ddi); + + return ret; +} + +/* + * This function is a wrapper for changing transfer mode. + * It is used for the panel driver before and after changing gamma value. + */ +static int s5p_mipi_dsi_change_transfer_mode(struct mipi_dsim_device *dsim, + unsigned int mode) +{ + if (mode < 0 || mode > 1) { + dev_err(dsim->dev, "mode range should be 0 or 1.\n"); + return -EINVAL; + } + + s5p_mipi_dsi_set_data_transfer_mode(dsim, mode); + + return 0; +} + +static struct mipi_dsim_ddi *find_mipi_client_registered + (struct mipi_dsim_device *dsim, const char *name) +{ + struct mipi_dsim_ddi *dsim_ddi; + struct mipi_dsim_lcd_driver *dsim_lcd_drv = NULL; + + mutex_lock(&mipi_lock); + + dev_dbg(dsim->dev, "find lcd panel driver(%s).\n", + name); + + list_for_each_entry(dsim_ddi, &dsim_ddi_list, list) { + dsim_lcd_drv = dsim_ddi->dsim_lcd_drv; + + if ((strcmp(dsim_lcd_drv->name, name)) == 0) { + mutex_unlock(&mipi_lock); + dev_dbg(dsim->dev, "found!!!(%s).\n", + dsim_lcd_drv->name); + return dsim_ddi; + } + } + + dev_warn(dsim->dev, "failed to find lcd panel driver(%s).\n", + name); + + mutex_unlock(&mipi_lock); + + return NULL; +} + +/* define MIPI-DSI Master operations. */ +static struct mipi_dsim_master_ops master_ops = { + .cmd_write = s5p_mipi_dsi_wr_data, + .get_dsim_frame_done = s5p_mipi_dsi_get_frame_done_status, + .clear_dsim_frame_done = s5p_mipi_dsi_clear_frame_done, + .change_dsim_transfer_mode = s5p_mipi_dsi_change_transfer_mode, +}; + +static int s5p_mipi_dsi_probe(struct platform_device *pdev) +{ + struct resource *res; + struct mipi_dsim_device *dsim; + struct mipi_dsim_config *dsim_config; + struct s5p_platform_mipi_dsim *dsim_pd; + int ret = -1; + + dsim = kzalloc(sizeof(struct mipi_dsim_device), GFP_KERNEL); + if (!dsim) { + dev_err(&pdev->dev, "failed to allocate dsim object.\n"); + return -EFAULT; + } + + dsim->pd = to_dsim_plat(pdev); + dsim->dev = &pdev->dev; + dsim->resume_complete = 0; + + /* get s5p_platform_mipi_dsim. */ + dsim_pd = (struct s5p_platform_mipi_dsim *)dsim->pd; + /* get mipi_dsim_config. */ + dsim_config = dsim_pd->dsim_config; + dsim->dsim_config = dsim_config; + dsim->master_ops = &master_ops; + + dsim->clock = clk_get(&pdev->dev, "dsim"); + if (IS_ERR(dsim->clock)) { + dev_err(&pdev->dev, "failed to get dsim clock source\n"); + goto err_clock_get; + } + + clk_enable(dsim->clock); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "failed to get io memory region\n"); + ret = -EINVAL; + goto err_platform_get; + } + + res = request_mem_region(res->start, resource_size(res), + dev_name(&pdev->dev)); + if (!res) { + dev_err(&pdev->dev, "failed to request io memory region\n"); + ret = -EINVAL; + goto err_mem_region; + } + + dsim->res = res; + + dsim->reg_base = ioremap(res->start, resource_size(res)); + if (!dsim->reg_base) { + dev_err(&pdev->dev, "failed to remap io region\n"); + ret = -EINVAL; + goto err_mem_region; + } + + /* + * it uses frame done interrupt handler + * only in case of MIPI Video mode. + */ + if (dsim_config->e_interface == DSIM_VIDEO) { + dsim->irq = platform_get_irq(pdev, 0); + if (request_irq(dsim->irq, s5p_mipi_dsi_interrupt_handler, + IRQF_DISABLED, "mipi-dsi", dsim)) { + dev_err(&pdev->dev, "request_irq failed.\n"); + goto err_trigger_irq; + } + } + + if (dsim->pd->mipi_power) + dsim->pd->mipi_power(dsim, 1); + else { + dev_err(&pdev->dev, "mipi_power is NULL.\n"); + goto err_mipi_power; + } + + /* find lcd panel driver registered to mipi-dsi driver. */ + dsim->dsim_ddi = find_mipi_client_registered(dsim, + dsim_pd->lcd_panel_name); + if (dsim->dsim_config == NULL) { + dev_err(&pdev->dev, "dsim_config is NULL.\n"); + goto err_dsim_config; + } + + /* set dsim to master of mipi_dsim_lcd_device. */ + set_master_to_device(dsim); + + s5p_mipi_dsi_init_dsim(dsim); + s5p_mipi_dsi_init_link(dsim); + + s5p_mipi_dsi_set_hs_enable(dsim); + /* set cpu command transfer mode to hs. */ + s5p_mipi_dsi_set_data_transfer_mode(dsim, 0); + + /* initialize mipi-dsi client(lcd panel). */ + if (master_to_driver(dsim) && (master_to_driver(dsim))->probe) + (master_to_driver(dsim))->probe(master_to_device(dsim)); + + /* it needs delay for stabilization */ + mdelay(dsim->pd->delay_for_stabilization); + + s5p_mipi_dsi_set_display_mode(dsim, dsim->dsim_config); + + /* set lcdc data transfer mode to hs. */ + s5p_mipi_dsi_set_data_transfer_mode(dsim, 1); + + /* in case of command mode, trigger. */ + if (dsim->dsim_config->e_interface == DSIM_COMMAND) { + if (dsim_pd->trigger) + dsim_pd->trigger(registered_fb[0]); + else + dev_warn(&pdev->dev, "trigger is null.\n"); + } + + platform_set_drvdata(pdev, dsim); + + dev_info(&pdev->dev, "mipi-dsi driver(%s mode) has been probed.\n", + (dsim_config->e_interface == DSIM_COMMAND) ? + "CPU" : "RGB"); + + return 0; + +err_dsim_config: + dsim->pd->mipi_power(dsim, 0); + +err_mipi_power: +err_trigger_irq: + release_resource(dsim->res); + kfree(dsim->res); + + iounmap((void __iomem *) dsim->reg_base); + +err_mem_region: +err_platform_get: + clk_disable(dsim->clock); + clk_put(dsim->clock); + +err_clock_get: + kfree(dsim); + + return ret; + +} + +static int __devexit s5p_mipi_dsi_remove(struct platform_device *pdev) +{ + struct mipi_dsim_device *dsim = platform_get_drvdata(pdev); + struct mipi_dsim_ddi *dsim_ddi = NULL; + + if (dsim->dsim_config->e_interface == DSIM_VIDEO) + free_irq(dsim->irq, dsim); + + iounmap(dsim->reg_base); + + clk_disable(dsim->clock); + clk_put(dsim->clock); + + release_resource(dsim->res); + kfree(dsim->res); + + list_for_each_entry(dsim_ddi, &dsim_ddi_list, list) + kfree(dsim_ddi); + + kfree(dsim); + + return 0; +} + +#ifdef CONFIG_PM +static int s5p_mipi_dsi_suspend(struct platform_device *pdev, + pm_message_t state) +{ + struct mipi_dsim_device *dsim = platform_get_drvdata(pdev); + + dsim->resume_complete = 0; + + if (master_to_driver(dsim) && (master_to_driver(dsim))->suspend) + (master_to_driver(dsim))->suspend(master_to_device(dsim)); + + clk_disable(dsim->clock); + + if (dsim->pd->mipi_power) + dsim->pd->mipi_power(dsim, 0); + + return 0; +} + +static int s5p_mipi_dsi_resume(struct platform_device *pdev) +{ + struct mipi_dsim_device *dsim = platform_get_drvdata(pdev); + + if (dsim->pd->mipi_power) + dsim->pd->mipi_power(dsim, 1); + + clk_enable(dsim->clock); + + s5p_mipi_dsi_init_dsim(dsim); + s5p_mipi_dsi_init_link(dsim); + + s5p_mipi_dsi_set_hs_enable(dsim); + /* set cpu command transfer mode to hs. */ + s5p_mipi_dsi_set_data_transfer_mode(dsim, 0); + + /* it needs delay for stabilization */ + mdelay(dsim->pd->delay_for_stabilization); + + if (master_to_driver(dsim) && (master_to_driver(dsim))->resume) + (master_to_driver(dsim))->resume(master_to_device(dsim)); + + s5p_mipi_dsi_set_display_mode(dsim, dsim->dsim_config); + + /* set lcdc data transfer mode to hs. */ + s5p_mipi_dsi_set_data_transfer_mode(dsim, 1); + + dsim->resume_complete = 1; + + return 0; +} +#else +#define s5p_mipi_dsi_suspend NULL +#define s5p_mipi_dsi_resume NULL +#endif + +static struct platform_driver s5p_mipi_dsi_driver = { + .probe = s5p_mipi_dsi_probe, + .remove = __devexit_p(s5p_mipi_dsi_remove), + .suspend = s5p_mipi_dsi_suspend, + .resume = s5p_mipi_dsi_resume, + .driver = { + .name = "s5p-mipi-dsim", + .owner = THIS_MODULE, + }, +}; + +static int s5p_mipi_dsi_register(void) +{ + platform_driver_register(&s5p_mipi_dsi_driver); + + return 0; +} + +static void s5p_mipi_dsi_unregister(void) +{ + platform_driver_unregister(&s5p_mipi_dsi_driver); +} + +module_init(s5p_mipi_dsi_register); +module_exit(s5p_mipi_dsi_unregister); + +MODULE_AUTHOR("InKi Dae "); +MODULE_DESCRIPTION("Samusung MIPI-DSI driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/video/s5p_mipi_dsi_common.c b/drivers/video/s5p_mipi_dsi_common.c new file mode 100644 index 0000000..cb5c280 --- /dev/null +++ b/drivers/video/s5p_mipi_dsi_common.c @@ -0,0 +1,635 @@ +/* linux/drivers/video/s5p_mipi_dsi_common.c + * + * Samsung MIPI-DSI common driver. + * + * InKi Dae, + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include