@@ -766,17 +766,21 @@ static struct omap_dss_device sdp4430_lcd_device = {
.data1_pol = 0,
.data2_lane = 3,
.data2_pol = 0,
- .div = {
+ },
+
+ .clocks = {
+ .dispc = {
+ .lck_div = 1, /* Logic Clock = 172.8 MHz */
+ .pck_div = 5, /* Pixel Clock = 34.56 MHz */
+ },
+
+ .dsi = {
.regn = 16, /* Fint = 2.4 MHz */
.regm = 180, /* DDR Clock = 216 MHz */
.regm_dispc = 5, /* PLL1_CLK1 = 172.8 MHz */
.regm_dsi = 5, /* PLL1_CLK2 = 172.8 MHz */
.lp_clk_div = 10, /* LP Clock = 8.64 MHz */
-
- .lck_div = 1, /* Logic Clock = 172.8 MHz */
- .pck_div = 5, /* Pixel Clock = 34.56 MHz */
-
},
},
.channel = OMAP_DSS_CHANNEL_LCD,
@@ -401,18 +401,6 @@ struct omap_dss_device {
u8 data2_lane;
u8 data2_pol;
- struct {
- u16 regn;
- u16 regm;
- u16 regm_dispc;
- u16 regm_dsi;
-
- u16 lp_clk_div;
-
- u16 lck_div;
- u16 pck_div;
- } div;
-
bool ext_te;
u8 ext_te_gpio;
} dsi;
@@ -424,6 +412,22 @@ struct omap_dss_device {
} phy;
struct {
+ struct {
+ u16 lck_div;
+ u16 pck_div;
+ } dispc;
+
+ struct {
+ u16 regn;
+ u16 regm;
+ u16 regm_dispc;
+ u16 regm_dsi;
+
+ u16 lp_clk_div;
+ } dsi;
+ } clocks;
+
+ struct {
struct omap_video_timings timings;
int acbi; /* ac-bias pin transitions per interrupt */
@@ -1026,7 +1026,7 @@ static int dsi_set_lp_clk_divisor(struct omap_dss_device *dssdev)
unsigned lp_clk_div;
unsigned long lp_clk;
- lp_clk_div = dssdev->phy.dsi.div.lp_clk_div;
+ lp_clk_div = dssdev->clocks.dsi.lp_clk_div;
if (lp_clk_div == 0 || lp_clk_div > dsi.lpdiv_max)
return -EINVAL;
@@ -3388,10 +3388,10 @@ static int dsi_configure_dsi_clocks(struct omap_dss_device *dssdev)
/* we always use DSS_CLK_SYSCK as input clock */
cinfo.use_sys_clk = true;
- cinfo.regn = dssdev->phy.dsi.div.regn;
- cinfo.regm = dssdev->phy.dsi.div.regm;
- cinfo.regm_dispc = dssdev->phy.dsi.div.regm_dispc;
- cinfo.regm_dsi = dssdev->phy.dsi.div.regm_dsi;
+ cinfo.regn = dssdev->clocks.dsi.regn;
+ cinfo.regm = dssdev->clocks.dsi.regm;
+ cinfo.regm_dispc = dssdev->clocks.dsi.regm_dispc;
+ cinfo.regm_dsi = dssdev->clocks.dsi.regm_dsi;
r = dsi_calc_clock_rates(dssdev, &cinfo);
if (r) {
DSSERR("Failed to calc dsi clocks\n");
@@ -3415,8 +3415,8 @@ static int dsi_configure_dispc_clocks(struct omap_dss_device *dssdev)
fck = dsi_get_pll_hsdiv_dispc_rate();
- dispc_cinfo.lck_div = dssdev->phy.dsi.div.lck_div;
- dispc_cinfo.pck_div = dssdev->phy.dsi.div.pck_div;
+ dispc_cinfo.lck_div = dssdev->clocks.dispc.lck_div;
+ dispc_cinfo.pck_div = dssdev->clocks.dispc.pck_div;
r = dispc_calc_clock_rates(fck, &dispc_cinfo);
if (r) {